HD61830 Datasheet, PDF (32/43 Pages) Hitachi Semiconductor – LCDC (LCD Timing Controller)

HD61830/HD61830B
HD61830 LCD Driver Interface (V_CC = 5 V ±10%, GND = 0 V, T_a = –20 to +75°C)
Item
Symbol Min
Typ
Clock pulse width (high level)
t _WCL1
450
—
Clock delay time
t _DCL2
—
—
Clock cycle time
t _WCL2
900
—
Clock pulse width
High level
t _WCH
450
—
Low level
t _WCL
450
—
MA, MB delay time
t _DM
—
—
FLM delay time
t _DF
—
—
Data delay time
t _DD
—
—
Data setup time
t _SD
250
—
Note: No load is applied to all the output terminals (MA, MB, FLM, D1, and D2).
Max
—
200
—
—
—
300
300
200
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
CL1
CL2
t_WCL1
1
2
V_CC
t_DCL2
t_WCL2
1
2
V_CC
t_WCH
t_WCL
MA, MB
1
2
V_CC
t_DM
t_DF
FLM
D1
1
2
V_CC
t_DD
t_SD
D2
1
2
V_CC
32