HD61830 Datasheet, PDF (23/43 Pages) Hitachi Semiconductor – LCDC (LCD Timing Controller)

HD61830/HD61830B
HD61830B Application (Character Mode, External CG, Character Font 8 × 8)
HD6303
A0
A1
to
A15
D0
to
D7
E
R/W
Decoder
Open
V_CC
External
clock
HD61830B
RS
CS
DB0
to
DB7
E
R/W
SYNC
RES
CR
WE
MA0
to
MA10
OE
CE
MA11
MA12
to
MA15
MD0
to
MD7
RD0
to
RD7
D1
FLM
MB
CL1
CL2
D2
MA
WE
OE
A0
to
RAM (1)
HM6116
D0
to
D7
A10
CS
A0–A3
A4 –A11
D0
to
D7
ROM
HN482732A
OE
CE
Open
+5 V
GND
–5 V
HD61830B Application (Graphic Mode)
WE
OE
A0
to
RAM (2)
HM6116
D0
to
D7
A10
CS
D1
FLM
M
CL1
CL2
D2
+5 V
GND
–5 V
V0
LCD module
HD6303
MPU
DB0 –DB7
CS E
RS R/W
RES
HD61830B
controller
MA0 –
MA15
OE ^MD0–MD7
D1
D2
CL1, CL2
MB, FLM
WE
CE
RAM
16 kbits
CMOS
GND
VDD (5 V)
V_EE (–5 V)
Segment
driver
LCD
Segment
driver
Segment
driver
V1 – V6
Power supply for
liquid crystal
display drive
Segment
driver
23