MC68HC705C8A_13 Datasheet, PDF (88/222 Pages) Freescale Semiconductor, Inc – Technical Data

Freescale Semiconductor, Inc.
Parallel Input/Output (I/O)
7.6 Port D
Port D is a 7-bit, special-purpose, input-only port that has no data
register. Reading address $0003 returns the logic states of the port D
pins.
Port D shares pins PD5–PD2 with the serial peripheral interface module
(SPI). When the SPI is enabled, PD5–PD2 read as logic 0s. When the
SPI is disabled, reading address $0003 returns the logic states of the
PD5–PD2 pins.
Port D shares pins PD1 and PD0 with the SCI module. When the SCI is
enabled, PD1 and PD0 read as logic 0s. When the SCI is disabled,
reading address $0003 returns the logic states of the PD1 and PD0 pins.
Address: $0003
Bit 7
6
5
4
3
2
1
Bit 0
Read: PD7
SS
SCK MOSI MISO TDO
RDI
Write:
Reset:
Unaffected by reset
= Unimplemented
Figure 7-10. Port D Fixed Input Register (PORTD)
Technical Data
88
Parallel Input/Output (I/O)
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MC68HC705C8A — Rev. 3