MC68HC705C8A_13 Datasheet, PDF (136/222 Pages) Freescale Semiconductor, Inc – Technical Data

Freescale Semiconductor, Inc.
Serial Communications Interface (SCI)
10.6.5 Baud Rate Register
The baud rate register shown in Figure 10-9 selects the baud rate for
both the receiver and the transmitter.
Address: $000D
Bit 7
6
5
4
3
2
1
Read:
Write:
SCP1 SCP0
SCR2 SCR1
Reset: U
U
0
0
U
U
U
= Unimplemented
U = Unaffected
Figure 10-9. Baud Rate Register (Baud)
Bit 0
SCR0
U
SCP1 and SCP0 — SCI Prescaler Select Bits
These read/write bits control prescaling of the baud rate generator
clock, as shown in Table 10-1. Resets clear both SCP1 and SCP0.
Table 10-1. Baud Rate Generator Clock Prescaling
SCP[1:0]
00
01
10
11
Baud Rate Generator Clock
Internal clock ÷ 1
Internal clock ÷ 3
Internal clock ÷ 4
Internal clock ÷ 13
Technical Data
136
Serial Communications Interface (SCI)
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MC68HC705C8A — Rev. 3