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| MC68HC705C8A_13 Datasheet, PDF (83/222 Pages) Freescale Semiconductor, Inc – Technical Data | |||
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Freescale Semiconductor, Inc.
Parallel Input/Output (I/O)
Port B
7.4.3 Port B Logic
Figure 7-6 shows the port B I/O logic.
VDD
PBPU7
FROM MOR1
READ $0005
WRITE $0005
RESET
DATA DIRECTION
REGISTER B
BIT DDRB7
WRITE $0001
PORT B DATA
REGISTER
PB7
BIT PB7
READ $0001
IRQ
FROM OPTION
REGISTER
FROM OTHER
PORT B PINS
IRQ
VDD
DQ
IRQ
LATCH
CQ
R
I BIT
FROM CCR
RESET
EXTERNAL INTERRUPT VECTOR FETCH
Figure 7-6. Port B I/O Logic
MC68HC705C8A â Rev. 3
MOTOROLA
Parallel Input/Output (I/O)
For More Information On This Product,
Go to: www.freescale.com
EXTERNAL
INTERRUPT
REQUEST
Technical Data
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