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MC68HC705C8A_13 Datasheet, PDF (182/222 Pages) Freescale Semiconductor, Inc – Technical Data
Freescale Semiconductor, Inc.
Electrical Specifications
13.10 3.3-Volt Control Timing
Characteristic(1)
Frequency of operation
Crystal option
External clock option
Symbol
Min
fOSC
—
dc
Max
Unit
2.0
2.0
MHz
Internal operating frequency
Crystal (fOSC ÷ 2)
External clock (fOSC ÷ 2)
Cycle time (see Figure 13-7)
Crystal oscillator startup time (see Figure 13-7)
Stop recovery startup time (crystal oscillator)
(see Figure 13-6)
fOP
—
dc
1.0
1.0
MHz
tCYC
1000
—
ns
tOXOV
—
100
ms
tILCH
—
100
ms
RESET pulse width, excluding power-up
(see Figure 13-7)
tRL
8
—
tCYC
Timer
Resolution(2)
Input capture pulse width (see Figure 13-5)
Input capture pulse period (see Figure 13-5)
Interrupt pulse width low (edge-triggered)
(see Figure 4-2. External Interrupt Timing)
tRESL
4.0
tTH, tTL
250
tTLTL
(3)
tILIH
250
—
tCYC
—
ns
—
tCYC
—
ns
Interrupt pulse period
(see Figure 4-2. External Interrupt Timing)
tILIL
(4)
—
tCYC
OSC1 pulse width
tOH, tOL
200
—
ns
1. VDD = 3.3 Vdc ± 0.3 Vdc, VSS = 0 Vdc; TA = TL to TH
2. Since a 2-bit prescaler in the timer must count four internal cycles (tCYC), this is the limiting minimum factor in determining
the timer resolution.
3. The minimum period, tTLTL, should not be less than the number of cycle times it takes to execute the capture interrupt ser-
vice routine plus 24 tCYC.
4. The minimum period, tILIL, should not be less than the number of cycle times it takes to execute the interrupt service routine
plus 19 tCYC.
EXTERNAL SIGNAL
(TCAP PIN 37)
tTLTL*
tTH*
tTL*
*Refer to timer resolution data in Figure 13-6 and Figure 13-7.
Figure 13-5. Timer Relationships
Technical Data
182
Electrical Specifications
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MC68HC705C8A — Rev. 3