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MC68HC705C8A_13 Datasheet, PDF (188/222 Pages) Freescale Semiconductor, Inc – Technical Data
Freescale Semiconductor, Inc.
Electrical Specifications
Number(1)
Characteristic(2)
Data hold time (outputs)
11
Master (after capture edge)
Slave (after enable edge)
Rise time(7)
12
SPI outputs (SCK, MOSI, MISO)
SPI inputs (SCK, MOSI, MISO, SS)
Fall time(8)
13
SPI outputs (SCK, MOSI, MISO)
SPI inputs (SCK, MOSI, MISO, SS)
1. Numbers refer to dimensions in Figure 13-8 and Figure 13-9.
2. VDD = 3.3 Vdc ± 10%
3. Signal production depends on software.
4. Time to data active from high-impedance state
5. Hold time to high-impedance state
6. With 200 pF on all SPI pins
7. 20% of VDD to 70% of VDD; CL = 200 pF
8. 70% of VDD to 20% of VDD; CL = 200 pF
Symbol
tHO(M)
tHO(S)
tR(M)
tR(S)
tF(M)
tF(S)
Min
0.25
0
—
—
—
—
Max
Unit
—
tCYC(M)
—
ns
200
ns
2.0
µs
200
ns
2.0
µs
Technical Data
188
Electrical Specifications
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MC68HC705C8A — Rev. 3