MC68HC705C8A_13 Datasheet, PDF (32/222 Pages) Freescale Semiconductor, Inc – Technical Data

Freescale Semiconductor, Inc.
General Description
1.7.3.3 External Clock Signal
An external clock from another
CMOS-compatible device can drive the
MCU
OSC1 input, with the OSC2 pin
unconnected, as Figure 1-11 shows.
EXTERNAL
CMOS CLOCK
Figure 1-11. External
Clock
NOTE: The bus frequency (f_OP) is one-half the external frequency (f_OSC) while
the processor clock cycle is two times the f_OSC period.
1.7.4 External Reset Pin (RESET)
A logic 0 on the bidirectional RESET pin forces the MCU to a known
startup state. The RESET pin contains an internal Schmitt trigger as part
of its input to improve noise immunity. See Section 5. Resets.
1.7.5 External Interrupt Request Pin (IRQ)
The IRQ pin is an asynchronous external interrupt pin. The IRQ pin
contains an internal Schmitt trigger as part of its input to improve noise
immunity. See 4.3.2 External Interrupt (IRQ).
1.7.6 Input Capture Pin (TCAP)
The TCAP pin is the input capture pin for the on-chip capture/compare
timer. The TCAP pin contains an internal Schmitt trigger as part of its
input to improve noise immunity. See Section 8. Capture/Compare
Timer.
Technical Data
32
General Description
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MC68HC705C8A — Rev. 3