K52P144M100SF2V2 Datasheet, PDF (74/80 Pages) Freescale Semiconductor, Inc – K52 Sub-Family

Pinout
144 144 Pin Name Default
ALT0
ALT1
ALT2
ALT3
ALT4
ALT5
ALT6
ALT7
EzPort
LQFP MAP
BGA
64 K9 PTA12
CMP2_IN0 CMP2_IN0 PTA12
FTM1_CH0 RMII0_RXD1/
MII0_RXD1
I2S0_TXD0 FTM1_QD_
PHA
65 J9 PTA13/
LLWU_P4
CMP2_IN1 CMP2_IN1 PTA13/
LLWU_P4
FTM1_CH1 RMII0_RXD0/
MII0_RXD0
I2S0_TX_FS FTM1_QD_
PHB
66 L10 PTA14
DISABLED
PTA14
SPI0_PCS0 UART0_TX RMII0_CRS_
DV/
MII0_RXDV
I2S0_RX_
BCLK
I2S0_TXD1
67 L11 PTA15
DISABLED
PTA15
SPI0_SCK UART0_RX RMII0_TXEN/
MII0_TXEN
I2S0_RXD0
68 K10 PTA16
DISABLED
PTA16
SPI0_SOUT UART0_CTS_ RMII0_TXD0/
b/
MII0_TXD0
UART0_COL_
b
I2S0_RX_FS I2S0_RXD1
69 K11 PTA17
ADC1_SE17 ADC1_SE17 PTA17
SPI0_SIN
UART0_RTS_ RMII0_TXD1/
b
MII0_TXD1
I2S0_MCLK
70 E8 VDD
VDD
VDD
71 G8 VSS
VSS
VSS
72 M12 PTA18
EXTAL0
EXTAL0
PTA18
FTM0_FLT2 FTM_CLKIN0
73 M11 PTA19
XTAL0
XTAL0
PTA19
FTM1_FLT0 FTM_CLKIN1
LPTMR0_
ALT1
74 L12 RESET_b RESET_b RESET_b
75 K12 PTA24
DISABLED
PTA24
MII0_TXD2
FB_A29
76 J12 PTA25
DISABLED
PTA25
MII0_TXCLK
FB_A28
77 J11 PTA26
DISABLED
PTA26
MII0_TXD3
FB_A27
78 J10 PTA27
DISABLED
PTA27
MII0_CRS
FB_A26
79 H12 PTA28
DISABLED
PTA28
MII0_TXER
FB_A25
80 H11 PTA29
DISABLED
PTA29
MII0_COL
FB_A24
81 H10 PTB0/
LLWU_P5
ADC0_SE8/
ADC1_SE8/
TSI0_CH0
ADC0_SE8/
ADC1_SE8/
TSI0_CH0
PTB0/
LLWU_P5
I2C0_SCL
FTM1_CH0 RMII0_MDIO/
MII0_MDIO
FTM1_QD_
PHA
82 H9 PTB1
ADC0_SE9/ ADC0_SE9/ PTB1
ADC1_SE9/ ADC1_SE9/
TSI0_CH6 TSI0_CH6
I2C0_SDA
FTM1_CH1 RMII0_MDC/
MII0_MDC
FTM1_QD_
PHB
83 G12 PTB2
ADC0_SE12/ ADC0_SE12/ PTB2
TSI0_CH7 TSI0_CH7
I2C0_SCL
UART0_RTS_ ENET0_1588_
b
TMR0
FTM0_FLT3
84 G11 PTB3
ADC0_SE13/ ADC0_SE13/ PTB3
TSI0_CH8 TSI0_CH8
I2C0_SDA
UART0_CTS_
b/
UART0_COL_
b
ENET0_1588_
TMR1
FTM0_FLT0
85 G10 PTB4
ADC1_SE10 ADC1_SE10 PTB4
ENET0_1588_
TMR2
FTM1_FLT0
86 G9 PTB5
ADC1_SE11 ADC1_SE11 PTB5
ENET0_1588_
TMR3
FTM2_FLT0
87 F12 PTB6
ADC1_SE12 ADC1_SE12 PTB6
FB_AD23
88 F11 PTB7
ADC1_SE13 ADC1_SE13 PTB7
FB_AD22
K52 Sub-Family Data Sheet, Rev. 1, 6/2012.
74
Preliminary
Freescale Semiconductor, Inc.
General Business Information