K52P144M100SF2V2 Datasheet, PDF (72/80 Pages) Freescale Semiconductor, Inc – K52 Sub-Family

Pinout
144 144 Pin Name Default
ALT0
ALT1
ALT2
ALT3
ALT4
ALT5
ALT6
ALT7
EzPort
LQFP MAP
BGA
21 G1 VOUT33 VOUT33 VOUT33
22 G2 VREGIN VREGIN VREGIN
23 J1 ADC0_DP1/ ADC0_DP1/ ADC0_DP1/
OP0_DP0 OP0_DP0 OP0_DP0
24 J2 ADC0_DM1/ ADC0_DM1/ ADC0_DM1/
OP0_DM0 OP0_DM0 OP0_DM0
25 K1 ADC1_DP1/ ADC1_DP1/ ADC1_DP1/
OP1_DP0/ OP1_DP0/ OP1_DP0/
OP1_DM1 OP1_DM1 OP1_DM1
26 K2 ADC1_DM1/ ADC1_DM1/ ADC1_DM1/
OP1_DM0 OP1_DM0 OP1_DM0
27 L1 PGA0_DP/ PGA0_DP/ PGA0_DP/
ADC0_DP0/ ADC0_DP0/ ADC0_DP0/
ADC1_DP3 ADC1_DP3 ADC1_DP3
28 L2 PGA0_DM/ PGA0_DM/ PGA0_DM/
ADC0_DM0/ ADC0_DM0/ ADC0_DM0/
ADC1_DM3 ADC1_DM3 ADC1_DM3
29 M1 PGA1_DP/ PGA1_DP/ PGA1_DP/
ADC1_DP0/ ADC1_DP0/ ADC1_DP0/
ADC0_DP3 ADC0_DP3 ADC0_DP3
30 M2 PGA1_DM/ PGA1_DM/ PGA1_DM/
ADC1_DM0/ ADC1_DM0/ ADC1_DM0/
ADC0_DM3 ADC0_DM3 ADC0_DM3
31 H5 VDDA
VDDA
VDDA
32 G5 VREFH
VREFH
VREFH
33 G6 VREFL
VREFL
VREFL
34 H6 VSSA
VSSA
VSSA
35 K3 ADC1_SE16/ ADC1_SE16/ ADC1_SE16/
OP1_OUT/ OP1_OUT/ OP1_OUT/
CMP2_IN2/ CMP2_IN2/ CMP2_IN2/
ADC0_SE22/ ADC0_SE22/ ADC0_SE22/
OP0_DP2/ OP0_DP2/ OP0_DP2/
OP1_DP2 OP1_DP2 OP1_DP2
36 J3 ADC0_SE16/ ADC0_SE16/ ADC0_SE16/
OP0_OUT/ OP0_OUT/ OP0_OUT/
CMP1_IN2/ CMP1_IN2/ CMP1_IN2/
ADC0_SE21/ ADC0_SE21/ ADC0_SE21/
OP0_DP1/ OP0_DP1/ OP0_DP1/
OP1_DP1 OP1_DP1 OP1_DP1
37 M3 VREF_OUT/ VREF_OUT/ VREF_OUT/
CMP1_IN5/ CMP1_IN5/ CMP1_IN5/
CMP0_IN5/ CMP0_IN5/ CMP0_IN5/
ADC1_SE18 ADC1_SE18 ADC1_SE18
38 L3 TRI0_OUT/ TRI0_OUT/ TRI0_OUT/
OP1_DM2 OP1_DM2 OP1_DM2
39 L4 TRI0_DM TRI0_DM TRI0_DM
40 M4 TRI0_DP TRI0_DP TRI0_DP
41 L5 TRI1_DM TRI1_DM TRI1_DM
K52 Sub-Family Data Sheet, Rev. 1, 6/2012.
72
Preliminary
Freescale Semiconductor, Inc.
General Business Information