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K52P144M100SF2V2 Datasheet, PDF (54/80 Pages) Freescale Semiconductor, Inc – K52 Sub-Family
Peripheral operating requirements and behaviors
Table 37. TRIAMP limited range operating requirements (continued)
Symbol Description
CL
Output load capacitance
Min.
—
Max.
100
Unit
pf
Notes
Table 38. TRIAMP limited range operating behaviors
Symbol
VOS
αVOS
IOS
IBIAS
ROUT
Description
Input offset voltage
Input offset voltage temperature coefficient
Input offset current
Input bias current
Output AC impedance
Min.
—
—
—
—
—
Typ.
±3
4.8
±300
±300
—
Max.
±5
—
±600
±600
1500
Unit
mV
μV/C
pA
pA
Ω
|XIN|
AC input impedance (fIN=100kHz)
—
159
—
CMRR
Input common mode rejection ratio
—
70
—
PSRR
Power supply rejection ratio
—
70
—
SR
Slew rate (ΔVIN=500mV) — Low-power mode 0.1
—
—
SR
Slew rate (ΔVIN=500mV) — High speed mode 1.5
3.5
—
GBW
Unity gain bandwidth — Low-power mode 50pF 0.15
—
—
GBW
Unity gain bandwidth — High speed mode 50pF 1
—
—
AV
DC open-loop voltage gain
80
—
—
GM
Gain margin
—
20
—
PM
Phase margin
60
69
—
kΩ
dB
dB
V/μs
V/μs
MHz
MHz
dB
dB
deg
Notes
@ 100kHz,
High speed
mode
6.6.7 Voltage reference electrical specifications
Table 39. VREF full-range operating requirements
Symbol
VDDA
TA
CL
Description
Supply voltage
Temperature
Output load capacitance
Min.
Max.
Unit
1.71
3.6
V
−40
105
°C
100
nF
Notes
1, 2
1. CL must be connected to VREF_OUT if the VREF_OUT functionality is being used for either an internal or external
reference.
2. The load capacitance should not exceed +/-25% of the nominal specified CL value over the operating temperature range of
the device.
K52 Sub-Family Data Sheet, Rev. 1, 6/2012.
54
Preliminary
Freescale Semiconductor, Inc.
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