S9S08SL8F1CTJ Datasheet, PDF (73/356 Pages) Freescale Semiconductor, Inc – provides the functional version of the on-chip modules

Chapter 5 Resets, Interrupts, and General System Control
5.7.3 System Options Register 1 (SOPT1)
This high page register is a write-once register so only the first write after reset is honored. It can be read
at any time. Any subsequent attempt to write to SOPT1 (intentionally or unintentionally) is ignored to
avoid accidental changes to these sensitive settings. SOPT1 should be written during the user’s reset
initialization program to set the desired controls even if the desired settings are the same as the reset
settings.
7
6
5
4
3
2
1
0
R
COPT
W
STOPE
SCIPS
IICPS
0
0
Reset:
1
1
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 5-4. System Options Register 1 (SOPT1)
Table 5-5. SOPT1 Register Field Descriptions
Field
Description
7:6
COP Watchdog Timeout — These write-once bits select the timeout period of the COP. COPT along with
COPT[1:0] COPCLKS in SOPT2 defines the COP timeout period. See Table 5-1.
5
STOPE
Stop Mode Enable — This write-once bit is used to enable stop mode. If stop mode is disabled and a user
program attempts to execute a STOP instruction, an illegal opcode reset is forced.
0 Stop mode disabled.
1 Stop mode enabled.
4
SCIPS
SCI Pin Select— This write-once bit selects the location of the RxD and TxD pins of the SCI module.
0 RxD on PTB0, TxD on PTB1.
1 RxD on PTA2, TxD on PTA3.
3:2
IICPS
IIC Pin Select— These write-once bits select the location of the SCL and SDA pins of the IIC module.
00 SDA on PTA2, SCL on PTA3.
01 SDA on PTB6, SCL on PTB7.
1x SDA on PTB2, SCL on PTB3.
MC9S08EL32 Series and MC9S08SL16 Series Data Sheet, Rev. 3
Freescale Semiconductor
73