S9S08SL8F1CTJ Datasheet, PDF (193/356 Pages) Freescale Semiconductor, Inc – provides the functional version of the on-chip modules

Table 12-3. Digital Receive Filter Clock Prescaler
Max Filter Delay (in μs)
Digital RX Filter
RXFP[2:0] Clock Prescaler
Filter Input Clock (SLIC clock in MHz)
(Divide by)
2
4
6
8
10
12
14
16
000
1
8.00 4.00 2.67 2.00 1.60 1.33 1.14 1.00
001
2
16.00 8.00 5.33 4.00 3.20 2.67 2.29 2.00
010
3
24.00 12.00 8.00 6.00 4.80 4.00 3.43 3.00
011
4
32.00 16.00 10.67 8.00 6.40 5.33 4.57 4.00
100
5
40.00 20.00 13.33 10.00 8.00 6.67 5.71 5.00
101
6
48.00 24.00 16.00 12.00 9.60 8.00 6.86 6.00
110
7
56.00 28.00 18.67 14.00 11.20 9.33 8.00 7.00
111
8
64.00 32.00 21.33 16.00 12.80 10.67 9.14 8.00
18
0.89
1.78
2.67
3.56
4.44
5.33
6.22
7.11
20
0.80
1.60
2.40
3.20
4.00
4.80
5.60
6.40
12.3.3 SLIC Bit Time Registers (SLCBTH, SLCBTL)
NOTE
In this subsection, the SLIC bit time registers are collectively referred to as
SLCBT.
In LIN operating mode (BTM = 0), the SLCBT is updated by the SLIC upon reception of a LIN break-sync
combination and provides the number of SLIC clock counts that equal one LIN bit time to the user
software. This value can be used by the software to calculate the clock drift in the oscillator as an offset to
a known count value (based on nominal oscillator frequency and LIN bus speed). The user software can
then trim the oscillator to compensate for clock drift. Refer to Section 12.6.17, “Oscillator Trimming with
SLIC,” for more information on this procedure. The user should only read the bit time value from
SLCBTH and SLCBTL in the interrupt service routine code for reception of the identifier byte. Reads at
any other time during LIN activity may not provide reliable results.
When in byte transfer mode (BTM = 1), the SLCBT must be written by the user to set the length of one
bit at the desired bit rate in SLIC clock counts. The user software must initialize this number prior to
sending or receiving data, based on the input clock selection, prescaler stage choice, and desired bit rate.
This setting is similar to choosing an input capture or output compare value for a timer. A write to both
registers is required to update the bit time value.
NOTE
The SLIC bit time will not be updated until a write of the SLCBTL has
occurred.
MC9S08EL32 Series and MC9S08SL16 Series Data Sheet, Rev. 3
Freescale Semiconductor
195