S9S08SL8F1CTJ Datasheet, PDF (48/356 Pages) Freescale Semiconductor, Inc – provides the functional version of the on-chip modules

Chapter 4 Memory
Table 4-5. Program and Erase Times
Parameter
Byte program
Burst program
Sector erase
Mass erase
Sector erase abort
1 _{Excluding start/end overhead}
Cycles of FCLK
9
4
4000
20,000
4
Time if FCLK = 200 kHz
45 μs
20 μs¹
20 ms
100 ms
20 μs¹
4.5.3 Program and Erase Command Execution
The FCDIV register must be initialized following any reset and any error flags cleared before beginning
command execution. The command execution steps are:
1. Write a data value to an address in the FLASH or EEPROM array. The address and data
information from this write is latched into the FLASH and EEPROM interface. This write is a
required first step in any command sequence. For erase and blank check commands, the value of
the data is not important. For sector erase commands, the address can be any address in the
512-byte sector of FLASH or 8-byte sector of EEPROM to be erased. For mass erase and blank
check commands, the address can be any address in the FLASH or EEPROM memory. FLASH and
EEPROM erase independently of each other.
NOTE
Do not program any byte in the FLASH or EEPROM more than once after
a successful erase operation. Reprogramming bits in a byte which is already
programmed is not allowed without first erasing the sector in which the byte
resides or mass erasing the entire FLASH or EEPROM memory.
Programming without first erasing may disturb data stored in the FLASH or
EEPROM.
2. Write the command code for the desired command to FCMD. The six valid commands are blank
check (0x05), byte program (0x20), burst program (0x25), sector erase (0x40), mass erase (0x41),
and sector erase abort (0x47). The command code is latched into the command buffer.
3. Write a 1 to the FCBEF bit in FSTAT to clear FCBEF and launch the command (including its
address and data information).
A partial command sequence can be aborted manually by writing a 0 to FCBEF any time after the write to
the memory array and before writing the 1 that clears FCBEF and launches the complete command.
Aborting a command in this way sets the FACCERR access error flag which must be cleared before
starting a new command.
A strictly monitored procedure must be obeyed or the command will not be accepted. This minimizes the
possibility of any unintended changes to the memory contents. The command complete flag (FCCF)
indicates when a command is complete. The command sequence must be completed by clearing FCBEF
to launch the command. Figure 4-2 is a flowchart for executing all of the commands except for burst
programming and sector erase abort.
MC9S08EL32 Series and MC9S08SL16 Series Data Sheet, Rev. 3
48
Freescale Semiconductor