S9S08SL8F1CTJ Datasheet, PDF (108/356 Pages) Freescale Semiconductor, Inc – provides the functional version of the on-chip modules

Chapter 7 Central Processor Unit (S08CPUV3)
Table 7-2. Instruction Set Summary (Sheet 6 of 9)
Source
Form
Operation
Object Code
Cyc-by-Cyc
Details
Affect
on CCR
V11H INZC
LSL opr8a
LSLA
LSLX
LSL oprx8,X
LSL ,X
LSL oprx8,SP
Logical Shift Left
C
b7
(Same as ASL)
0
b0
DIR
38 dd
5 rfwpp
INH
48
1p
INH
58
1p
IX1
68 ff
5 rfwpp
IX
78
4 rfwp
SP1
9E 68 ff
6 prfwpp
11– –
LSR opr8a
LSRA
LSRX
LSR oprx8,X
LSR ,X
LSR oprx8,SP
Logical Shift Right
0
b7
C
b0
DIR
34 dd
5 rfwpp
INH
44
1p
INH
54
1p
IX1
64 ff
5 rfwpp
IX
74
4 rfwp
SP1
9E 64 ff
6 prfwpp
11– –0
MOV opr8a,opr8a
MOV opr8a,X+
MOV #opr8i,opr8a
MOV ,X+,opr8a
Move
(M)_destination ← (M)_source
In IX+/DIR and DIR/IX+ Modes,
H:X ← (H:X) + $0001
DIR/DIR
DIR/IX+
IMM/DIR
IX+/DIR
4E dd dd
5E dd
6E ii dd
7E dd
5 rpwpp
5 rfwpp
4 pwpp
5 rfwpp
011– ––
MUL
Unsigned multiply
X:A ← (X) × (A)
INH
42
5 ffffp
–110 –––0
NEG opr8a
NEGA
NEGX
NEG oprx8,X
NEG ,X
NEG oprx8,SP
Negate
M ← – (M) = $00 – (M) DIR
(Two’s Complement) A ← – (A) = $00 – (A) INH
X ← – (X) = $00 – (X) INH
M ← – (M) = $00 – (M) IX1
M ← – (M) = $00 – (M) IX
M ← – (M) = $00 – (M) SP1
30 dd
40
50
60 ff
70
9E 60 ff
5 rfwpp
1p
1p
5 rfwpp
4 rfwp
6 prfwpp
11– –
NOP
No Operation — Uses 1 Bus Cycle
INH
9D
1p
–11– ––––
NSA
Nibble Swap Accumulator
A ← (A[3:0]:A[7:4])
INH
62
1p
–11– ––––
ORA #opr8i
ORA opr8a
ORA opr16a
ORA oprx16,X
ORA oprx8,X
ORA ,X
ORA oprx16,SP
ORA oprx8,SP
Inclusive OR Accumulator and Memory
A ← (A) | (M)
IMM
DIR
EXT
IX2
IX1
IX
SP2
SP1
AA ii
2 pp
BA dd
3 rpp
CA hh ll 4 prpp
DA ee ff 4 prpp
EA ff
3 rpp
FA
3 rfp
9E DA ee ff 5 pprpp
9E EA ff
4 prpp
011– ––
PSHA
Push Accumulator onto Stack
Push (A); SP ← (SP) – $0001
INH
87
2 sp
–11– ––––
PSHH
Push H (Index Register High) onto Stack
Push (H); SP ← (SP) – $0001
INH
8B
2 sp
–11– ––––
PSHX
Push X (Index Register Low) onto Stack
Push (X); SP ← (SP) – $0001
INH
89
2 sp
–11– ––––
PULA
Pull Accumulator from Stack
SP ← (SP + $0001); Pull (A)
INH
86
3 ufp
–11– ––––
PULH
Pull H (Index Register High) from Stack
SP ← (SP + $0001); Pull (H)
INH
8A
3 ufp
–11– ––––
PULX
Pull X (Index Register Low) from Stack
SP ← (SP + $0001); Pull (X)
INH
88
3 ufp
–11– ––––
MC9S08EL32 Series and MC9S08SL16 Series Data Sheet, Rev. 3
108
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