S9S08SL8F1CTJ Datasheet, PDF (188/356 Pages) Freescale Semiconductor, Inc – provides the functional version of the on-chip modules

entering SLIC stop mode, any activity on the network will cause the SLIC module to exit SLIC stop mode
and generate an unmaskable interrupt of the CPU. This wakeup interrupt state is reflected in the SLCSV,
encoded as the highest priority interrupt. This interrupt can be cleared by the CPU with a read of the
SLCSV and clearing of the SLCF interrupt flag. Depending upon which low-power mode instruction the
CPU executes to cause the SLIC module to enter SLIC stop, the message which wakes up the SLIC module
(and the CPU) may or may not be received.
There are two different possibilities:
1. Wakeup from SLIC Stop with CPU in STOP
When the CPU executes the STOP instruction, all clocks in the MCU, including clocks to the SLIC
module, are turned off. Therefore, the message which wakes up the SLIC module and the CPU
from stop mode will not be received. This is due primarily to the amount of time required for the
MCU's oscillator to stabilize before the clocks can be applied internally to the other MCU modules,
including the SLIC module.
2. Wakeup from SLIC Stop with CPU in WAIT. If the CPU executes the WAIT instruction and the
SLIC module enters the stop mode (SLCWCM = 1), the clocks to the SLIC module are turned off,
but the clocks in the MCU continue to run. Therefore, the message which wakes up the SLIC
module from stop and the CPU from wait mode will be received correctly by the SLIC module.
This is because very little time is required for the CPU to turn the clocks to the SLIC module back
on after the wakeup interrupt occurs.
NOTE
While the SLIC module will correctly receive a message which arrives
when the SLIC module is in stop or wait mode and the MCU is in wait
mode, if the user enters this mode while a message is being received, the
data in the message will become corrupted. This is due to the steps required
for the SLIC module to resume operation upon exiting stop or wait mode,
and its subsequent resynchronization with the LIN bus.
12.1.2.8 Normal and Emulation Mode Operation
The SLIC module operates in the same manner in all normal and emulation modes. All SLIC module
registers can be read and written except those that are reserved, unimplemented, or write once. The user
must be careful not to unintentionally change reserved bits to avoid unexpected SLIC module behavior.
12.1.2.9 Special Mode Operation
Some aspects of SLIC module operation can be modified in special test mode. This mode is reserved for
internal use only.
12.1.2.10 Low-Power Options
The SLIC module can save power in disabled, wait, and stop modes.
MC9S08EL32 Series and MC9S08SL16 Series Data Sheet, Rev. 3
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Freescale Semiconductor