K20P81M72SF1 Datasheet, PDF (67/74 Pages) Freescale Semiconductor, Inc – K20 Sub-Family

81 80
MAP LQFP
BGA
Pin Name
K5 22 DAC0_OUT/
CMP1_IN3/
ADC0_SE23
L7 — RTC_
WAKEUP_B
L4 23 XTAL32
L5 24 EXTAL32
K6 25 VBAT
J6 26 PTA0
Default
DAC0_OUT/
CMP1_IN3/
ADC0_SE23
RTC_
WAKEUP_B
XTAL32
EXTAL32
VBAT
JTAG_TCLK/
SWD_CLK/
EZP_CLK
ALT0
DAC0_OUT/
CMP1_IN3/
ADC0_SE23
RTC_
WAKEUP_B
XTAL32
EXTAL32
VBAT
TSI0_CH1
ALT1
PTA0
H8 27 PTA1
J7 28 PTA2
H9 29 PTA3
J8 30 PTA4/
LLWU_P3
K7 31 PTA5
JTAG_TDI/ TSI0_CH2
EZP_DI
JTAG_TDO/ TSI0_CH3
TRACE_SWO/
EZP_DO
JTAG_TMS/ TSI0_CH4
SWD_DIO
NMI_b/
TSI0_CH5
EZP_CS_b
DISABLED
PTA1
PTA2
PTA3
PTA4/
LLWU_P3
PTA5
E5 — VDD
G3 — VSS
K8 32 PTA12
VDD
VDD
VSS
VSS
CMP2_IN0 CMP2_IN0 PTA12
L8 33 PTA13/
LLWU_P4
K9 34 PTA14
CMP2_IN1
DISABLED
CMP2_IN1
PTA13/
LLWU_P4
PTA14
L9 35 PTA15
DISABLED
PTA15
J10 36 PTA16
DISABLED
PTA16
H10 37 PTA17
ADC1_SE17 ADC1_SE17 PTA17
L10 38 VDD
K10 39 VSS
L11 40 PTA18
K11 41 PTA19
VDD
VDD
VSS
VSS
EXTAL0
EXTAL0
PTA18
XTAL0
XTAL0
PTA19
J11 42 RESET_b
G11 43 PTB0/
LLWU_P5
RESET_b
ADC0_SE8/
ADC1_SE8/
TSI0_CH0
RESET_b
ADC0_SE8/
ADC1_SE8/
TSI0_CH0
PTB0/
LLWU_P5
Pinout
ALT2
ALT3
ALT4
ALT5
ALT6
ALT7
EzPort
UART0_CTS_
b/
UART0_COL_
b
FTM0_CH5
UART0_RX FTM0_CH6
UART0_TX FTM0_CH7
UART0_RTS_ FTM0_CH0
b
FTM0_CH1
USB_CLKIN FTM0_CH2
JTAG_TCLK/ EZP_CLK
SWD_CLK
JTAG_TDI EZP_DI
JTAG_TDO/ EZP_DO
TRACE_SWO
JTAG_TMS/
SWD_DIO
NMI_b
EZP_CS_b
CMP2_OUT I2S0_TX_
BCLK
JTAG_TRST_
b
CAN0_TX FTM1_CH0
CAN0_RX FTM1_CH1
SPI0_PCS0 UART0_TX
SPI0_SCK
SPI0_SOUT
SPI0_SIN
UART0_RX
UART0_CTS_
b/
UART0_COL_
b
UART0_RTS_
b
I2S0_TXD0
I2S0_TX_FS
I2S0_RX_
BCLK
I2S0_RXD0
I2S0_RX_FS
FTM1_QD_
PHA
FTM1_QD_
PHB
I2S0_TXD1
I2S0_RXD1
I2S0_MCLK
FTM0_FLT2 FTM_CLKIN0
FTM1_FLT0 FTM_CLKIN1
I2C0_SCL FTM1_CH0
LPTMR0_
ALT1
FTM1_QD_
PHA
K20 Sub-Family Data Sheet, Rev. 2, 4/2012.
Freescale Semiconductor, Inc.
67