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K20P81M72SF1 Datasheet, PDF (14/74 Pages) Freescale Semiconductor, Inc – K20 Sub-Family
General
Symbol
tPOR
Table 5. Power mode transition operating behaviors
Description
Min.
Max.
Unit
After a POR event, amount of time from the point VDD
—
300
μs
reaches 1.71 V to execution of the first instruction
across the operating temperature range of the chip.
• VLLS1 → RUN
—
112
μs
• VLLS2 → RUN
—
74
μs
• VLLS3 → RUN
—
73
μs
• LLS → RUN
—
5.9
μs
• VLPS → RUN
—
5.8
μs
• STOP → RUN
—
4.2
μs
1. Normal boot (FTFL_OPT[LPBOOT]=1)
Notes
1
5.2.5 Power consumption operating behaviors
Table 6. Power consumption operating behaviors
Symbol
IDDA
IDD_RUN
Description
Analog supply current
Run mode current — all peripheral clocks
disabled, code executing from flash
• @ 1.8V
• @ 3.0V
IDD_RUN
Run mode current — all peripheral clocks
enabled, code executing from flash
• @ 1.8V
• @ 3.0V
• @ 25°C
• @ 125°C
IDD_WAIT
IDD_WAIT
IDD_VLPR
Wait mode high frequency current at 3.0 V — all
peripheral clocks disabled
Wait mode reduced frequency current at 3.0 V
— all peripheral clocks disabled
Very-low-power run mode current at 3.0 V — all
peripheral clocks disabled
Min.
—
—
—
—
—
—
—
—
—
Typ.
Max.
Unit
—
See note
mA
21.5
25
mA
21.5
30
mA
31
34
mA
31
34
mA
32
39
mA
12.5
—
mA
7.2
—
mA
0.996
—
mA
Table continues on the next page...
Notes
1
2
3, 4
2
5
6
K20 Sub-Family Data Sheet, Rev. 2, 4/2012.
14
Freescale Semiconductor, Inc.