K20P81M72SF1 Datasheet, PDF (37/74 Pages) Freescale Semiconductor, Inc – K20 Sub-Family

Peripheral operating requirements and behaviors
The following timing numbers indicate when data is latched or driven onto the external
bus, relative to the Flexbus output clock (FB_CLK). All other timing relationships can be
derived from these values.
Table 23. Flexbus limited voltage range switching specifications
Num
FB1
FB2
FB3
FB4
FB5
Description
Operating voltage
Frequency of operation
Clock period
Address, data, and control output valid
Address, data, and control output hold
Data and FB_TA input setup
Data and FB_TA input hold
Min.
2.7
—
20
—
0.5
8.5
0.5
Max.
3.6
FB_CLK
—
11.5
—
—
—
Unit
V
MHz
ns
ns
ns
ns
ns
Notes
1
1
2
2
1. Specification is valid for all FB_AD[31:0], FB_BE/BWEn, FB_CSn, FB_OE, FB_R/W,FB_TBST, FB_TSIZ[1:0], FB_ALE,
and FB_TS.
2. Specification is valid for all FB_AD[31:0] and FB_TA.
Table 24. Flexbus full voltage range switching specifications
Num
FB1
FB2
FB3
FB4
FB5
Description
Operating voltage
Frequency of operation
Clock period
Address, data, and control output valid
Address, data, and control output hold
Data and FB_TA input setup
Data and FB_TA input hold
Min.
1.71
—
1/FB_CLK
—
0
13.7
0.5
Max.
3.6
FB_CLK
—
13.5
—
—
—
Unit
V
MHz
ns
ns
ns
ns
ns
Notes
1
1
2
2
1. Specification is valid for all FB_AD[31:0], FB_BE/BWEn, FB_CSn, FB_OE, FB_R/W,FB_TBST, FB_TSIZ[1:0], FB_ALE,
and FB_TS.
2. Specification is valid for all FB_AD[31:0] and FB_TA.
K20 Sub-Family Data Sheet, Rev. 2, 4/2012.
Freescale Semiconductor, Inc.
37