K20P81M72SF1 Datasheet, PDF (43/74 Pages) Freescale Semiconductor, Inc – K20 Sub-Family

Peripheral operating requirements and behaviors
Table 26. 16-bit ADC characteristics (V_REFH = V_DDA, V_REFL = V_SSA) (continued)
Symbol Description
SFDR Spurious free
dynamic range
Conditions¹
16 bit differential mode
• Avg=32
Min.
82
Typ.²
95
Max.
—
Unit
Notes
7
dB
16 bit single-ended mode
• Avg=32
78
90
—
dB
E_IL
Input leakage
error
V_TEMP25
Temp sensor
slope
Temp sensor
voltage
–40°C to 105°C
25°C
I_In × R_AS
—
1.715
—
—
719
—
mV
mV/°C
I_In =
leakage
current
(refer to
the MCU's
voltage
and
current
operating
ratings)
mV
1. All accuracy numbers assume the ADC is calibrated with V_REFH = V_DDA
2. Typical values assume V_DDA = 3.0 V, Temp = 25°C, f_ADCK = 2.0 MHz unless otherwise stated. Typical values are for
reference only and are not tested in production.
3. The ADC supply current depends on the ADC conversion clock speed, conversion rate and the ADLPC bit (low power).
For lowest power operation the ADLPC bit should be set, the HSC bit should be clear with 1MHz ADC conversion clock
speed.
4. _{1 LSB = (VREFH - VREFL)/2}^N
5. ADC conversion clock <16MHz, Max hardware averaging (AVGE = %1, AVGS = %11)
6. Input data is 100 Hz sine wave. ADC conversion clock <12MHz.
7. Input data is 1 kHz sine wave. ADC conversion clock <12MHz.
K20 Sub-Family Data Sheet, Rev. 2, 4/2012.
Freescale Semiconductor, Inc.
43