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K20P81M72SF1 Datasheet, PDF (54/74 Pages) Freescale Semiconductor, Inc – K20 Sub-Family
Peripheral operating requirements and behaviors
Table 33. VREF full-range operating behaviors
Symbol
Vout
Vout
Vout
Vstep
Vtdrift
Ibg
Ilp
Ihp
ΔVLOAD
Description
Voltage reference output with factory trim at
nominal VDDA and temperature=25C
Voltage reference output — factory trim
Voltage reference output — user trim
Voltage reference trim step
Temperature drift (Vmax -Vmin across the full
temperature range)
Bandgap only current
Low-power buffer current
High-power buffer current
Load regulation
• current = ± 1.0 mA
Min.
1.1915
1.1584
1.193
—
—
—
—
—
Typ.
1.195
—
—
0.5
—
—
—
—
Max.
1.1977
1.2376
1.197
—
80
80
360
1
—
200
—
Unit
V
V
V
mV
mV
µA
uA
mA
µV
Notes
1
1
1
1, 2
Tstup Buffer startup time
—
—
20
µs
Vvdrift Voltage drift (Vmax - Vmin across the full voltage
—
2
—
mV
1
range)
1. See the chip's Reference Manual for the appropriate settings of the VREF Status and Control register.
2. Load regulation voltage is the difference between the VREF_OUT voltage with no load vs. voltage with defined load
Table 34. VREF limited-range operating requirements
Symbol
TA
Description
Temperature
Min.
0
Max.
50
Unit
Notes
°C
Table 35. VREF limited-range operating behaviors
Symbol
Vout
Description
Voltage reference output with factory trim
Min.
Max.
Unit
1.173
1.225
V
Notes
Symbol
VREFH
VREFL
IBIASP_AFE_4µA
Description
Voltage reference
output with factory
trim
Voltage reference
output
P-bias current
output
Min
1.173
0.38
3.5µ
Max
1.225
0.42
4.5µ
Unit
V
V
A
Notes
K20 Sub-Family Data Sheet, Rev. 2, 4/2012.
54
Freescale Semiconductor, Inc.