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K20P81M72SF1 Datasheet, PDF (42/74 Pages) Freescale Semiconductor, Inc – K20 Sub-Family
Peripheral operating requirements and behaviors
6.6.1.2 16-bit ADC electrical characteristics
Table 26. 16-bit ADC characteristics (VREFH = VDDA, VREFL = VSSA)
Symbol Description
IDDA_ADC Supply current
fADACK
ADC
asynchronous
clock source
Conditions1
• ADLPC=1, ADHSC=0
• ADLPC=1, ADHSC=1
• ADLPC=0, ADHSC=0
• ADLPC=0, ADHSC=1
Min.
0.215
1.2
3.0
2.4
4.4
Typ.2
—
2.4
4.0
5.2
6.2
Max.
1.7
3.9
7.3
6.1
9.5
Unit
mA
MHz
MHz
MHz
MHz
TUE
Sample Time
See Reference Manual chapter for sample times
Total unadjusted
error
• 12 bit modes
• <12 bit modes
—
±4
—
±1.4
±6.8
±2.1
LSB4
DNL
Differential non-
linearity
INL Integral non-
linearity
EFS
Full-scale error
• 12 bit modes
• <12 bit modes
• 12 bit modes
• <12 bit modes
• 12 bit modes
• <12 bit modes
—
±0.7
-1.1 to
LSB4
+1.9
—
±0.2
-0.3 to 0.5
—
±1.0
-2.7 to
LSB4
+1.9
—
±0.5
-0.7 to
+0.5
—
-4
-5.4
LSB4
—
-1.4
-1.8
EQ
Quantization
error
• 16 bit modes
• ≤13 bit modes
ENOB
Effective number 16 bit differential mode
of bits
• Avg=32
• Avg=4
—
-1 to 0
—
LSB4
—
—
±0.5
12.8
14.5
—
bits
11.9
13.8
—
bits
Notes
3
tADACK = 1/
fADACK
5
5
5
VADIN =
VDDA
5
6
16 bit single-ended mode
• Avg=32
• Avg=4
12.2
13.9
—
bits
11.4
13.1
—
bits
SINAD
Signal-to-noise
plus distortion
See ENOB
6.02 × ENOB + 1.76
dB
THD
Total harmonic
distortion
16 bit differential mode
• Avg=32
7
—
–94
—
dB
16 bit single-ended mode
• Avg=32
—
-85
—
dB
Table continues on the next page...
K20 Sub-Family Data Sheet, Rev. 2, 4/2012.
42
Freescale Semiconductor, Inc.