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K20P81M72SF1 Datasheet, PDF (40/74 Pages) Freescale Semiconductor, Inc – K20 Sub-Family
Peripheral operating requirements and behaviors
6.6.1 ADC electrical specifications
The 16-bit accuracy specifications listed in Table 25 and Table 26 are achievable on the
differential pins ADCx_DP0, ADCx_DM0.
The ADCx_DP2 and ADCx_DM2 ADC inputs are connected to the PGA outputs and are
not direct device pins. Accuracy specifications for these pins are defined in Table 27 and
Table 28.
All other ADC channels meet the 13-bit differential/12-bit single-ended accuracy
specifications.
6.6.1.1 16-bit ADC operating conditions
Table 25. 16-bit ADC operating conditions
Symbol
VDDA
ΔVDDA
Description
Supply voltage
Supply voltage
ΔVSSA Ground voltage
VREFH
VREFL
VADIN
CADIN
ADC reference
voltage high
Reference
voltage low
Input voltage
Input
capacitance
Conditions
Absolute
Delta to VDD (VDD-
VDDA)
Delta to VSS (VSS-
VSSA)
• 16 bit modes
• 8/10/12 bit
modes
Min.
1.71
-100
-100
1.13
VSSA
VREFL
—
—
Typ.1
—
0
0
VDDA
VSSA
—
8
4
Max.
3.6
+100
+100
VDDA
VSSA
VREFH
10
5
Unit
V
mV
mV
V
V
V
pF
RADIN
RAS
Input resistance
Analog source
resistance
13/12 bit modes
fADCK < 4MHz
—
2
5
kΩ
—
—
5
kΩ
fADCK
fADCK
ADC conversion ≤ 13 bit modes
clock frequency
ADC conversion 16 bit modes
clock frequency
1.0
—
18.0
2.0
—
12.0
Table continues on the next page...
MHz
MHz
Notes
2
2
3
4
4
K20 Sub-Family Data Sheet, Rev. 2, 4/2012.
40
Freescale Semiconductor, Inc.