K20P144M120SF3_1210 Datasheet, PDF (67/86 Pages) Freescale Semiconductor, Inc – K20 Sub-Family

6.8.8 I²C switching specifications
See General switching specifications.
Peripheral operating requirements and behaviors
6.8.9 UART switching specifications
See General switching specifications.
6.8.10 SDHC specifications
The following timing specs are defined at the chip I/O pin and must be translated
appropriately to arrive at timing specs/constraints for the physical interface.
Table 46. SDHC switching specifications over a limited operating voltage
range
Num
SD1
SD2
SD3
SD4
SD5
SD6
SD7
SD8
Symbol
fpp
fpp
fpp
f_OD
t_WL
t_WH
t_TLH
t_THL
t_OD
t_ISU
t_IH
Description
Min.
Max.
Operating voltage
2.7
3.6
Card input clock
Clock frequency (low speed)
0
400
Clock frequency (SD\SDIO full speed)
0
25
Clock frequency (MMC full speed)
0
20
Clock frequency (identification mode)
0
400
Clock low time
7
—
Clock high time
7
—
Clock rise time
—
3
Clock fall time
—
3
SDHC output / card inputs SDHC_CMD, SDHC_DAT (reference to SDHC_CLK)
SDHC output delay (output valid)
-5
6.5
SDHC input / card inputs SDHC_CMD, SDHC_DAT (reference to SDHC_CLK)
SDHC input setup time
5
—
SDHC input hold time
0
—
Unit
V
kHz
MHz
MHz
kHz
ns
ns
ns
ns
ns
ns
ns
Table 47. SDHC switching specifications over the full operating voltage
range
Num
Symbol Description
Operating voltage
Card input clock
Min.
Max.
Unit
1.71
3.6
V
Table continues on the next page...
K20 Sub-Family Data Sheet, Rev. 4, 10/2012.
Freescale Semiconductor, Inc.
67