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K20P144M120SF3_1210 Datasheet, PDF (13/86 Pages) Freescale Semiconductor, Inc – K20 Sub-Family
Table 1. Voltage and current operating requirements (continued)
Symbol
VIH
VIL
VHYS
IICDIO
IICAIO
IICcont
Description
Input high voltage (digital pins)
• 2.7 V ≤ VDD ≤ 3.6 V
• 1.7 V ≤ VDD ≤ 2.7 V
Input low voltage (digital pins)
• 2.7 V ≤ VDD ≤ 3.6 V
• 1.7 V ≤ VDD ≤ 2.7 V
Input hysteresis (digital pins)
Digital pin negative DC injection current — single pin
• VIN < VSS-0.3V
Analog2, EXTAL0/XTAL0, and EXTAL1/XTAL1 pin DC
injection current — single pin
• VIN < VSS-0.3V (Negative current injection)
• VIN > VDD+0.3V (Positive current injection)
Contiguous pin DC injection current —regional limit,
includes sum of negative injection currents or sum of
positive injection currents of 16 contiguous pins
• Negative current injection
• Positive current injection
Min.
0.7 × VDD
0.75 × VDD
—
—
0.06 × VDD
-5
-5
—
-25
—
Max.
—
—
0.35 × VDD
0.3 × VDD
—
—
—
+5
—
+25
Unit
V
V
V
V
V
mA
mA
mA
VRAM VDD voltage required to retain RAM
1.2
—
V
VRFVBAT VBAT voltage required to retain the VBAT register file
VPOR_VBAT
—
V
General
Notes
1
3
1. All 5 V tolerant digital I/O pins are internally clamped to VSS through a ESD protection diode. There is no diode connection
to VDD. If VIN greater than VDIO_MIN (=VSS-0.3V) is observed, then there is no need to provide current limiting resistors at
the pads. If this limit cannot be observed then a current limiting resistor is required. The negative DC injection current
limiting resistor is calculated as R=(VDIO_MIN-VIN)/|IIC|.
2. Analog pins are defined as pins that do not have an associated general purpose I/O port function.
3. All analog pins are internally clamped to VSS and VDD through ESD protection diodes. If VIN is greater than VAIO_MIN
(=VSS-0.3V) and VIN is less than VAIO_MAX(=VDD+0.3V) is observed, then there is no need to provide current limiting
resistors at the pads. If these limits cannot be observed then a current limiting resistor is required. The negative DC
injection current limiting resistor is calculated as R=(VAIO_MIN-VIN)/|IIC|. The positive injection current limiting resistor is
calculated as R=(VIN-VAIO_MAX)/|IIC|. Select the larger of these two calculated resistances.
5.2.2 LVD and POR operating requirements
Table 2. LVD and POR operating requirements
Symbol
VPOR
VLVDH
Description
Falling VDD POR detect voltage
Falling low-voltage detect threshold — high
range (LVDV=01)
Min.
0.8
2.48
Typ.
1.1
2.56
Max.
1.5
2.64
Table continues on the next page...
Unit
Notes
V
V
K20 Sub-Family Data Sheet, Rev. 4, 10/2012.
Freescale Semiconductor, Inc.
13