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K20P144M120SF3_1210 Datasheet, PDF (46/86 Pages) Freescale Semiconductor, Inc – K20 Sub-Family
Peripheral operating requirements and behaviors
6.6.1 ADC electrical specifications
The 16-bit accuracy specifications listed in Table 28 and Table 29 are achievable on the
differential pins ADCx_DP0, ADCx_DM0.
The ADCx_DP2 and ADCx_DM2 ADC inputs are connected to the PGA outputs and are
not direct device pins. Accuracy specifications for these pins are defined in Table 30 and
Table 31.
All other ADC channels meet the 13-bit differential/12-bit single-ended accuracy
specifications.
6.6.1.1 16-bit ADC operating conditions
Table 28. 16-bit ADC operating conditions
Symbol
VDDA
ΔVDDA
ΔVSSA
VREFH
VREFL
VADIN
Description
Supply voltage
Supply voltage
Ground voltage
ADC reference
voltage high
ADC reference
voltage low
Input voltage
Conditions
Absolute
Delta to VDD (VDD-VDDA)
Delta to VSS (VSS - VSSA)
• 16-bit differential mode
• All other modes
VADIN
CADIN
Input voltage
Input capacitance
• 16-bit mode
• 8-/10-/12-bit modes
Min.
1.71
-100
-100
1.13
VSSA
VREFL
VREFL
VREFL
—
—
Typ.1
—
0
0
VDDA
VSSA
—
—
—
8
4
Max.
3.6
+100
+100
VDDA
VSSA
31/32 *
VREFH
VREFH
VREFH
10
5
RADIN
RAS
Input resistance
Analog source
resistance
13-/12-bit modes
fADCK < 4 MHz
—
2
5
—
—
5
fADCK
fADCK
Crate
ADC conversion ≤ 13-bit mode
clock frequency
1.0
—
ADC conversion 16-bit mode
clock frequency
2.0
—
ADC conversion ≤ 13 bit modes
rate
No ADC hardware averaging 20.000
—
Continuous conversions
enabled, subsequent
conversion time
Table continues on the next page...
18.0
12.0
818.330
Unit
V
mV
mV
V
V
V
V
pF
kΩ
kΩ
MHz
MHz
Ksps
Notes
2
2
3
4
4
5
K20 Sub-Family Data Sheet, Rev. 4, 10/2012.
46
Freescale Semiconductor, Inc.