K20P144M120SF3_1210 Datasheet, PDF (15/86 Pages) Freescale Semiconductor, Inc – K20 Sub-Family

Table 4. Voltage and current operating behaviors (continued)
Symbol
I_OHT
I_{OHT_io60}
V_OL
Description
Output high current total for all ports
Output high current total for fast digital ports
Output low voltage — high drive strength
• 2.7 V ≤ V_DD ≤ 3.6 V, I_OL = 9mA
• 1.71 V ≤ V_DD ≤ 2.7 V, I_OL = 3mA
Min.
Max.
Unit
—
100
mA
—
100
mA
—
0.5
V
—
0.5
V
Output low voltage — low drive strength
• 2.7 V ≤ V_DD ≤ 3.6 V, I_OL = 2mA
• 1.71 V ≤ V_DD ≤ 2.7 V, I_OL = 0.6mA
—
0.5
V
—
0.5
V
I_OLT
I_{OLT_io60}
I_IN
I_IN
I_OZ
R_PU
R_PD
Output low current total for all ports
Output low current total for fast digital ports
Input leakage current (per pin) for full temperature
range
Input leakage current (per pin) at 25°C
Hi-Z (off-state) leakage current (per pin)
Internal pullup resistors
Internal pulldown resistors
—
100
mA
—
100
mA
—
1
μA
—
0.025
μA
—
1
μA
20
50
kΩ
20
50
kΩ
1. Measured at VDD=3.6V
2. Measured at V_DD supply voltage = V_DD min and Vinput = V_SS
3. Measured at V_DD supply voltage = V_DD min and Vinput = V_DD
General
Notes
1
1
2
3
5.2.4 Power mode transition operating behaviors
All specifications except t_POR, and VLLSx→RUN recovery times in the following table
assume this clock configuration:
• CPU and system clocks = FEI 100 MHz
• Bus clock = 50 MHz
• FlexBus clock = 50 MHz
• Flash clock = 25 MHz
Table 5. Power mode transition operating behaviors
Symbol Description
Min.
Max.
Unit
t_POR
After a POR event, amount of time from the point V_DD
—
300
μs
reaches 1.71 V to execution of the first instruction
across the operating temperature range of the chip.
• VLLS1 → RUN
—
160
μs
• VLLS2 → RUN
—
114
μs
Notes
1
Table continues on the next page...
K20 Sub-Family Data Sheet, Rev. 4, 10/2012.
Freescale Semiconductor, Inc.
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