FXLS8471Q Datasheet, PDF (64/75 Pages) Freescale Semiconductor, Inc – Linear Accelerometer

Table 131. Time step for PULSE_TMLT with HP_FILTER_CUTOFF[pls_hpf_en] = 0
ODR (Hz)
800
400
200
100
50
12.5
6.25
1.56
Normal
0.159
0.159
0.319
0.638
1.28
1.28
1.28
1.28
Max time range (s)
LPLN
High
resolution
0.159
0.159
0.159
0.159
0.319
0.159
0.638
0.159
1.28
0.159
5.1
0.159
5.1
0.159
5.1
0.159
Low power
0.159
0.319
0.638
1.28
2.55
10.2
10.2
10.2
Normal
0.625
0.625
1.25
2.5
5
5
5
5
Time step (ms)
LPLN
High
resolution
0.625
0.625
0.625
0.625
1.25
0.625
2.5
0.625
5
0.625
20
0.625
20
0.625
20
0.625
Low power
0.625
1.25
2.5
5
10
40
40
40
Therefore an ODR setting of 400 Hz, when accelerometer OSR is set to normal using CTRL_REG2, would result in a maximum
pulse-time limit of (0.625 ms * 255) = 159 ms.
10.11.7 PULSE_LTCY (0x27) register
Table 132. PULSE_LTCY register
pls_ltcy[7:0]
8’b00000000
Table 133. PULSE_LTCY bit description
Field
pls_ltcy[7:0]
Description
pls_ltcy[7:0] defines the time interval that starts after the first pulse detection where the pulse-detection function ignores
the start of a new pulse.
Minimum time step for the pulse latency is defined in Tables 134 and 135. Maximum time is “(time step @ ODR and power mode)
x 255”.
Table 134. Time step for PULSE_LTCY with HP_FILTER_CUTOFF[pls_hpf_en] = 1
ODR (Hz)
800
400
200
100
50
12.5
6.25
1.56
Normal
0.638
1.276
2.56
5.1
10.2
10.2
10.2
10.2
Max time range (s)
LPLN
High
resolution
0.638
0.638
1.276
1.276
2.56
1.276
5.1
1.276
10.2
1.276
40.8
1.276
40.8
1.276
40.8
1.276
Low power
0.638
1.276
2.56
5.1
10.2
40.8
81.6
81.6
Normal
2.5
5
10
20
40
40
40
40
Time step (ms)
LPLN
High
resolution
2.5
2.5
5
5
10
5
20
5
40
5
160
5
160
5
160
5
Low power
2.5
5
10
20
40
160
320
320
FXLS8471Q
64
Sensors
Freescale Semiconductor, Inc.