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FXLS8471Q Datasheet, PDF (47/75 Pages) Freescale Semiconductor, Inc – Linear Accelerometer
10.7.2 PL_CFG (0x11) register
This register enables the Portrait/Landscape function and sets the behavior of the debounce counter.
Table 62. PL_CFG register
dbcntm
pl_en
—
—
—
—
—
—
1
0
0
0
0
0
0
0
Table 63. PL_CFG bit descriptions
Field
dbcntm
pl_en
Description
Debounce counter mode selection.
0: Decrements debounce whenever condition of interest is no longer valid.
1: Clears counter whenever condition of interest is no longer valid.
Portrait/Landscape detection enable.
0: Portrait/Landscape detection is disabled.
1: Portrait/Landscape detection is enabled.
10.7.3 PL_COUNT (0x12) register
This register sets the debounce count for the orientation state transition. The minimum debounce latency is determined by the
system ODR value and the value of the PL_COUNT register. Any change to the system ODR or a transition from Active to
Standby (or vice-versa) resets the internal landscape/portrait internal debounce counters.
Table 64. PL_COUNT register
dbnce[7:0]
8’b00000000
Table 65. PL_Count Relationship with the ODR
ODR (Hz)
800
400
200
100
50
12.5
6.25
1.56
Normal
0.319
0.638
1.28
2.55
5.1
5.1
5.1
5.1
Max time range (s)
LPLN
High
resolution
0.319
0.319
0.638
0.638
1.28
0.638
2.55
0.638
5.1
0.638
20.4
0.638
20.4
0.638
20.4
0.638
Low power
0.319
0.638
1.28
2.55
5.1
20.4
40.8
40.8
Normal
1.25
2.5
5
10
20
20
20
20
Time step (ms)
LPLN
High
resolution
1.25
1.25
2.5
2.5
5
2.5
10
2.5
20
2.5
80
2.5
80
2.5
80
2.5
Low power
1.25
2.5
5
10
20
80
160
160
Sensors
Freescale Semiconductor, Inc.
FXLS8471Q
47