FXLS8471Q Datasheet, PDF (36/75 Pages) Freescale Semiconductor, Inc – Linear Accelerometer

10.1.11 CTRL_REG4 [Interrupt Enable Register] (0x2D) register
Table 38. CTRL_REG4 register
int_en_aslp
0
int_en_fifo
0
int_en_trans
0
int_en_lndprt
0
int_en_pulse
0
int_en_ffmt
0
int_en_a_vecm
0
int_en_drdy
0
Table 39. Interrupt Enable Register bit descriptions
Field
int_en_aslp
int_en_fifo
int_en_trans
int_en_lndprt
int_en_pulse
int_en_ffmt
int_en_a_vecm
int_en_drdy
Description
Sleep interrupt enable
0: Auto-Sleep/Wake interrupt disabled
1: Auto-Sleep/Wake interrupt enabled
FIFO interrupt enable
0: FIFO interrupt disabled
1: FIFO interrupt enabled
Transient interrupt enable
0: Transient interrupt disabled
1: Transient interrupt enabled
Orientation interrupt enable
0: Orientation (Landscape/Portrait) interrupt disabled
1: Orientation (Landscape/Portrait) interrupt enabled
Pulse interrupt enable
0: Pulse detection interrupt disabled
1: Pulse detection interrupt enabled
Freefall/motion interrupt enable
0: Freefall/motion interrupt disabled
1: Freefall/motion interrupt enabled
Acceleration vector-magnitude interrupt enable
0: Acceleration vector-magnitude interrupt disabled
1: Acceleration vector-magnitude interrupt enabled
Data-ready interrupt enable
0: Data-ready interrupt disabled
1: Data-ready interrupt enabled
The corresponding functional block interrupt enable bit allows the functional block to route its event detection flag to the system’s
interrupt controller. The interrupt controller routes the enabled interrupt signals to either the INT1 or INT2 pins depending on the
settings made in CTRL_REG5.
FXLS8471Q
36
Sensors
Freescale Semiconductor, Inc.