K20P48M50SF0 Datasheet, PDF (43/60 Pages) Freescale Semiconductor, Inc – K20 Sub-Family

0.18
Peripheral operating requirements and behaviors
0.16
0.14
0.12
0.1
0.08
0.06
HYSTCTR
Setting
00
01
10
11
0.04
0.02
0
0.1 0.4 0.7 1 1.3 1.6 1.9 2.2 2.5 2.8 3.1
Vin level (V)
Figure 14. Typical hysteresis vs. Vin level (VDD=3.3V, PMODE=1)
6.6.3 Voltage reference electrical specifications
Table 26. VREF full-range operating requirements
Symbol
V_DDA
T_A
C_L
Description
Supply voltage
Temperature
Output load capacitance
Min.
1.71
Max.
3.6
−40
105
100
Unit
Notes
V
°C
nF
1, 2
1. C_L must be connected to VREF_OUT if the VREF_OUT functionality is being used for either an internal or external
reference.
2. The load capacitance should not exceed +/-25% of the nominal specified C_L value over the operating temperature range of
the device.
Table 27. VREF full-range operating behaviors
Symbol Description
Min.
Typ.
V_out Voltage reference output with factory trim at
nominal V_DDA and temperature=25C
1.1915
1.195
Table continues on the next page...
Max.
1.1977
Unit
V
Notes
K20 Sub-Family Data Sheet, Rev. 4 5/2012.
Freescale Semiconductor, Inc.
43