K20P48M50SF0 Datasheet, PDF (24/60 Pages) Freescale Semiconductor, Inc – K20 Sub-Family

Peripheral operating requirements and behaviors
TCLK
Data inputs
Data outputs
Data outputs
Data outputs
J5
J6
Input data valid
J7
Output data valid
J8
J7
Output data valid
Figure 5. Boundary scan (JTAG) timing
TCLK
TDI/TMS
TDO
TDO
TDO
J9
J10
Input data valid
J11
Output data valid
J12
J11
Output data valid
Figure 6. Test Access Port timing
K20 Sub-Family Data Sheet, Rev. 4 5/2012.
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Freescale Semiconductor, Inc.