K20P48M50SF0 Datasheet, PDF (25/60 Pages) Freescale Semiconductor, Inc – K20 Sub-Family

TCLK
TRST
J14
J13
Peripheral operating requirements and behaviors
Figure 7. TRST timing
6.2 System modules
There are no specifications necessary for the device's system modules.
6.3 Clock modules
6.3.1 MCG specifications
Table 13. MCG specifications
Symbol Description
Min.
f_{ints_ft} Internal reference frequency (slow clock) —
—
factory trimmed at nominal VDD and 25 °C
f_{ints_t}
Internal reference frequency (slow clock) — user
trimmed
31.25
Δ_{fdco_res_t} Resolution of trimmed average DCO output
—
frequency at fixed voltage and temperature —
using SCTRIM and SCFTRIM
Δf_{dco_t} Total deviation of trimmed average DCO output
—
frequency over voltage and temperature
Δf_{dco_t} Total deviation of trimmed average DCO output
—
frequency over fixed voltage and temperature
range of 0–70°C
f_{intf_ft} Internal reference frequency (fast clock) —
—
factory trimmed at nominal VDD and 25°C
f_{intf_t} Internal reference frequency (fast clock) — user
3
trimmed at nominal VDD and 25 °C
f_{loc_low}
Loss of external clock minimum frequency —
RANGE = 00
(3/5) x
f_{ints_t}
f_{loc_high} Loss of external clock minimum frequency —
RANGE = 01, 10, or 11
(16/5) x
f_{ints_t}
FLL
Typ.
32.768
—
± 0.3
+0.5/-0.7
± 0.3
4
—
—
—
Table continues on the next page...
Max.
—
39.0625
± 0.6
±3
—
—
5
—
—
Unit
kHz
kHz
%f_dco
%f_dco
%f_dco
MHz
MHz
kHz
kHz
Freescale Semiconductor, Inc.
K20 Sub-Family Data Sheet, Rev. 4 5/2012.
Notes
1
1
1
25