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K20P48M50SF0 Datasheet, PDF (36/60 Pages) Freescale Semiconductor, Inc – K20 Sub-Family
Peripheral operating requirements and behaviors
6.6.1 ADC electrical specifications
The 16-bit accuracy specifications listed in Table 23 and Table 24 are achievable on the
differential pins ADCx_DP0, ADCx_DM0.
All other ADC channels meet the 13-bit differential/12-bit single-ended accuracy
specifications.
6.6.1.1 16-bit ADC operating conditions
Table 23. 16-bit ADC operating conditions
Symbol
VDDA
ΔVDDA
Description
Supply voltage
Supply voltage
ΔVSSA Ground voltage
VREFH
VREFL
VADIN
CADIN
ADC reference
voltage high
Reference
voltage low
Input voltage
Input
capacitance
Conditions
Absolute
Delta to VDD (VDD-
VDDA)
Delta to VSS (VSS-
VSSA)
• 16 bit modes
• 8/10/12 bit
modes
Min.
1.71
-100
-100
1.13
VSSA
VREFL
—
—
Typ.1
—
0
0
VDDA
VSSA
—
8
4
Max.
3.6
+100
+100
VDDA
VSSA
VREFH
10
5
Unit
V
mV
mV
V
V
V
pF
RADIN
RAS
Input resistance
Analog source
resistance
13/12 bit modes
fADCK < 4MHz
—
2
5
kΩ
—
—
5
kΩ
fADCK
fADCK
Crate
ADC conversion ≤ 13 bit modes
clock frequency
1.0
—
ADC conversion 16 bit modes
clock frequency
2.0
—
ADC conversion
rate
≤ 13 bit modes
No ADC hardware
averaging
20.000
—
Continuous
conversions enabled,
subsequent conversion
time
Table continues on the next page...
18.0
12.0
818.330
MHz
MHz
Ksps
Notes
2
2
3
4
4
5
K20 Sub-Family Data Sheet, Rev. 4 5/2012.
36
Freescale Semiconductor, Inc.