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K20P48M50SF0 Datasheet, PDF (26/60 Pages) Freescale Semiconductor, Inc – K20 Sub-Family
Peripheral operating requirements and behaviors
Table 13. MCG specifications (continued)
Symbol Description
Min.
ffll_ref FLL reference frequency range
31.25
fdco
DCO output
Low range (DRS=00)
20
frequency range
640 × ffll_ref
Mid range (DRS=01)
40
1280 × ffll_ref
Mid-high range (DRS=10)
60
1920 × ffll_ref
High range (DRS=11)
80
2560 × ffll_ref
fdco_t_DMX3 DCO output
2
frequency
Low range (DRS=00)
—
732 × ffll_ref
Mid range (DRS=01)
—
1464 × ffll_ref
Mid-high range (DRS=10)
—
2197 × ffll_ref
High range (DRS=11)
—
2929 × ffll_ref
Jcyc_fll FLL period jitter
—
• fVCO = 48 MHz
• fVCO = 98 MHz
—
tfll_acquire FLL target frequency acquisition time
—
PLL
fvco
VCO operating frequency
48.0
Ipll
PLL operating current
• PLL @ 96 MHz (fosc_hi_1 = 8 MHz, fpll_ref =
—
2 MHz, VDIV multiplier = 48)
Ipll
PLL operating current
• PLL @ 48 MHz (fosc_hi_1 = 8 MHz, fpll_ref =
—
2 MHz, VDIV multiplier = 24)
fpll_ref PLL reference frequency range
2.0
Jcyc_pll PLL period jitter (RMS)
• fvco = 48 MHz
—
• fvco = 100 MHz
—
Typ.
—
20.97
Max.
39.0625
25
41.94
50
62.91
75
83.89
100
23.99
—
47.97
—
71.99
—
95.98
—
180
—
150
—
—
1
—
100
1060
—
600
—
—
4.0
120
—
50
—
Table continues on the next page...
Unit
kHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
ps
ms
MHz
µA
µA
MHz
ps
ps
Notes
2, 3
4, 5
6
7
7
8
K20 Sub-Family Data Sheet, Rev. 4 5/2012.
26
Freescale Semiconductor, Inc.