33781_09 Datasheet, PDF (4/44 Pages) Freescale Semiconductor, Inc – Quad DSI 2.02 Master with

PIN CONNECTIONS
Table 1. 33781 Pin Definitions
A functional description of each Pin can be found in the Functional Pin Descriptions section beginning on page 15.
Pin
Pin Name Pin Function Formal Name
Definition
12
VPP
Input
Test Mode
A high-voltage on this pin puts the device in test mode for IC
manufacturing test. It must be grounded in the application.
13
VCC
Input
Logic Supply
Regulated 5V input
14
CLK
Input
Clock Input
4.0MHz clock input
15
TESTIN
Test
Test Input
Input pin for device test. This pin must be tied to ground in the application.
16
TESTOUT
Test
Test Output
Output pin for device test. This pin is left floating in the application.
17
VSS_IDDQ
Ground
Digital Ground and ^{Ground reference for the digital circuits that should not consume current}
IDDQ Test
during IDDQ testing. This ground is not connected to the other grounds
internally.
18
GND
Ground
Power Ground
Bus power return
19
D3L
Output Driver Low Side Bus 3 Bus 3 low side
20
D3H
Output Driver High Side Bus 3 ^{Bus 3 high side}
21
VSUP2
Power
Positive Supply for ^{This supply input is used to provide the positive level output of buses 2}
Bus Outputs
and 3.
22
D2H
Output Driver High Side Bus 2 ^{Bus 2 high side}
23
D2L
Output Driver Low Side Bus 2 ^{Bus 2 low side}
24
GND
Ground
Power Ground
Bus power return
25
D1L
Output Driver Low Side Bus 1 Bus 1 low side
26
D1H
Output Driver High Side Bus 1 ^{Bus 1 high side}
27
VSUP1
Power
Positive Supply for ^{This supply input is used to provide the positive level output of buses 0}
Bus Outputs
and 1.
28
D0H
Output Driver High Side Bus 0 ^{Bus 0 high side}
29
DPH
Output Driver High Side Pseudo Bus ^{Pseudo Bus high side}
30
D0L
Output Driver Low Side Bus 0 Bus 0 low side
31
DPL
Output Driver Low Side Pseudo Bus ^{Pseudo Bus low side}
32
GND
Ground
Power Ground
Bus power return
33781
4
Analog Integrated Circuit Device Data
Freescale Semiconductor