33781_09 Datasheet, PDF (39/44 Pages) Freescale Semiconductor, Inc – Quad DSI 2.02 Master with

FUNCTIONAL DEVICE OPERATION
PROTECTION AND DIAGNOSTIC FEATURES
nodes to charge. In the case of DLY changing, any partial
inter-frame delay based on old control settings is lost.
ENABLE (DISABLE) FUNCTION
When a DBUS channel is disabled, the 33781 device
forces its bus output to tri-state. When the channel is disabled
the channel addressed buffer data bits are cleared, the status
register bits are reset, and the transmit and receive queue
reset. Any DBUS transfer that was in progress is stopped.
CHANNEL LOOP FUNCTION
When loop mode is enabled the transmitter and receiver
circuits are connected within the IC. This allows data to be
passed directly through the transmit and receive circuits
without going out on the DBUS channel. When LOOP mode
is enabled the DBUS channel is disconnected from the
transmitter and receiver circuits so that any bus fault
conditions do not interfere with this test. When the loop
function is enabled, the EN bit in the DnEN register is cleared,
the buffer data bits are cleared, the status register bits are
reset, and the transmit and receive queue reset the by the
state machine. When the loop mode is exited the state
machine sets the registers to their reset state and resets the
transmit and receive queue. This allows proper start up of bus
transactions.
The channel queue pointers work the same as in non-loop
mode.
Analog Integrated Circuit Device Data
Freescale Semiconductor
33781
39