K30P121M100SF2V2 Datasheet, PDF (21/67 Pages) Freescale Semiconductor, Inc – K30 Sub-Family

Board type
—
Symbol
Ψ_JT
Peripheral operating requirements and behaviors
Description
121 MAPBGA
Thermal
3
characterization
parameter, junction
to package top
outside center
(natural
convection)
Unit
°C/W
Notes
4
1.
Determined according to JEDEC Standard JESD51-2, Integrated Circuits Thermal Test Method Environmental
Conditions—Natural Convection (Still Air), or EIA/JEDEC Standard JESD51-6, Integrated Circuit Thermal Test Method
Environmental Conditions—Forced Convection (Moving Air).
2.
Determined according to JEDEC Standard JESD51-8, Integrated Circuit Thermal Test Method Environmental
Conditions—Junction-to-Board.
3.
Determined according to Method 1012.1 of MIL-STD 883, Test Method Standard, Microcircuits, with the cold plate
temperature used for the case temperature. The value includes the thermal resistance of the interface material
between the top of the package and the cold plate.
4.
Determined according to JEDEC Standard JESD51-2, Integrated Circuits Thermal Test Method Environmental
Conditions—Natural Convection (Still Air).
6 Peripheral operating requirements and behaviors
6.1 Core modules
6.1.1 Debug trace timing specifications
Table 12. Debug trace operating behaviors
Symbol
T_cyc
T_wl
T_wh
T_r
T_f
T_s
T_h
Description
Clock period
Low pulse width
High pulse width
Clock and data rise time
Clock and data fall time
Data setup
Data hold
Min.
Max.
Frequency dependent
2
—
2
—
—
3
—
3
3
—
2
—
Unit
MHz
ns
ns
ns
ns
ns
ns
Figure 3. TRACE_CLKOUT specifications
K30 Sub-Family Data Sheet, Rev. 1, 6/2012.
Freescale Semiconductor, Inc.
Preliminary
21
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