K30P121M100SF2V2 Datasheet, PDF (20/67 Pages) Freescale Semiconductor, Inc – K30 Sub-Family

General
1. This is the minimum pulse width that is guaranteed to pass through the pin synchronization circuitry. Shorter pulses may or
may not be recognized. In Stop, VLPS, LLS, and VLLSx modes, the synchronizer is bypassed so shorter pulses can be
recognized in that case.
2. The greater synchronous and asynchronous timing must be met.
3. This is the minimum pulse width that is guaranteed to be recognized as a pin interrupt request in Stop, VLPS, LLS, and
VLLSx modes.
4. 75pF load
5. 15pF load
5.4 Thermal specifications
5.4.1 Thermal operating requirements
Table 11. Thermal operating requirements
Symbol
T_J
T_A
Description
Die junction temperature
Ambient temperature
Min.
Max.
Unit
–40
125
°C
–40
°C
5.4.2 Thermal attributes
Board type
Single-layer (1s)
Symbol
R_θJA
Four-layer (2s2p) R_θJA
Single-layer (1s) R_θJMA
Four-layer (2s2p) R_θJMA
—
R_θJB
—
R_θJC
Description
121 MAPBGA
Thermal
65
resistance, junction
to ambient (natural
convection)
Thermal
36
resistance, junction
to ambient (natural
convection)
Thermal
52
resistance, junction
to ambient (200 ft./
min. air speed)
Thermal
31
resistance, junction
to ambient (200 ft./
min. air speed)
Thermal
17
resistance, junction
to board
Thermal
13
resistance, junction
to case
Table continues on the next page...
Unit
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
Notes
1
1
1
1
2
3
K30 Sub-Family Data Sheet, Rev. 1, 6/2012.
20
Preliminary
Freescale Semiconductor, Inc.
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