MC9S08AW60 Datasheet, PDF (207/320 Pages) Freescale Semiconductor, Inc – Microcontrollers

Serial Peripheral Interface (S08SPIV3)
Table 12-6. SPI Baud Rate Divisor
SPR2:SPR1:SPR0
0:0:0
0:0:1
0:1:0
0:1:1
1:0:0
1:0:1
1:1:0
1:1:1
Rate Divisor
2
4
8
16
32
64
128
256
12.3.4 SPI Status Register (SPI1S)
This register has three read-only status bits. Bits 6, 3, 2, 1, and 0 are not implemented and always read 0.
Writes have no meaning or effect.
7
6
5
4
3
2
1
0
R SPRF
0
SPTEF
MODF
0
0
0
0
W
Reset
0
0
1
0
0
0
0
0
= Unimplemented or Reserved
Figure 12-9. SPI Status Register (SPI1S)
Field
7
SPRF
Table 12-7. SPI1S Register Field Descriptions
Description
SPI Read Buffer Full Flag — SPRF is set at the completion of an SPI transfer to indicate that received data may
be read from the SPI data register (SPI1D). SPRF is cleared by reading SPRF while it is set, then reading the
SPI data register.
0 No data available in the receive data buffer
1 Data available in the receive data buffer
MC9S08AW60 Data Sheet, Rev.1.0
Freescale Semiconductor
207