MC9S08AW60 Datasheet, PDF (117/320 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 7 Central Processor Unit (S08CPUV2)
IX = 16-bit indexed no offset
IX+ = 16-bit indexed no offset, post increment (CBEQ and MOV only)
IX1 = 16-bit indexed with 8-bit offset from H:X
IX1+ = 16-bit indexed with 8-bit offset, post increment
(CBEQ only)
IX2 = 16-bit indexed with 16-bit offset from H:X
REL = 8-bit relative offset
SP1 = Stack pointer with 8-bit offset
SP2 = Stack pointer with 16-bit offset
Table 7-2. HCS08 Instruction Set Summary (Sheet 1 of 7)
Source
Form
Operation
Description
Effect
on CCR
VH I NZC
ADC #opr8i
ADC opr8a
ADC opr16a
ADC oprx16,X
ADC oprx8,X
ADC ,X
ADC oprx16,SP
ADC oprx8,SP
ADD #opr8i
ADD opr8a
ADD opr16a
ADD oprx16,X
ADD oprx8,X
ADD ,X
ADD oprx16,SP
ADD oprx8,SP
AIS #opr8i
AIX #opr8i
AND #opr8i
AND opr8a
AND opr16a
AND oprx16,X
AND oprx8,X
AND ,X
AND oprx16,SP
AND oprx8,SP
ASL opr8a
ASLA
ASLX
ASL oprx8,X
ASL ,X
ASL oprx8,SP
ASR opr8a
ASRA
ASRX
ASR oprx8,X
ASR ,X
ASR oprx8,SP
BCC rel
Add with Carry
Add without Carry
Add Immediate Value
(Signed) to Stack Pointer
Add Immediate Value
(Signed) to Index
Register (H:X)
Logical AND
Arithmetic Shift Left
(Same as LSL)
Arithmetic Shift Right
Branch if Carry Bit Clear
A ← (A) + (M) + (C)
A ← (A) + (M)
SP ← (SP) + (M)
M is sign extended to a 16-bit value
H:X ← (H:X) + (M)
M is sign extended to a 16-bit value
A ← (A) & (M)
C
b7
0
b0
C
b7
b0
Branch if (C) = 0
IMM
DIR
EXT
–
IX2
IX1
IX
SP2
SP1
IMM
DIR
EXT
–
IX2
IX1
IX
SP2
SP1
– – – – – – IMM
– – – – – – IMM
0––
IMM
DIR
EXT
–
IX2
IX1
IX
SP2
SP1
DIR
INH
––
INH
IX1
IX
SP1
DIR
INH
––
INH
IX1
IX
SP1
– – – – – – REL
A9 ii
2
B9 dd
3
C9 hh ll 4
D9 ee ff 4
E9 ff
3
F9
3
9ED9 ee ff 5
9EE9 ff
4
AB ii
2
BB dd
3
CB hh ll 4
DB ee ff 4
EB ff
3
FB
3
9EDB ee ff 5
9EEB ff
4
A7 ii
2
AF ii
2
A4 ii
2
B4 dd
3
C4 hh ll 4
D4 ee ff 4
E4 ff
3
F4
3
9ED4 ee ff 5
9EE4 ff
4
38 dd
5
48
1
58
1
68 ff
5
78
4
9E68 ff
6
37 dd
5
47
1
57
1
67 ff
5
77
4
9E67 ff
6
24 rr
3
MC9S08AW60 Data Sheet, Rev.1.0
Freescale Semiconductor
117