MC9S08AW60 Datasheet, PDF (16/320 Pages) Freescale Semiconductor, Inc – Microcontrollers

14.4.4 Data Result Low Register (ADC1RL) ..........................................................................239
14.4.5 Compare Value High Register (ADC1CVH) ................................................................240
14.4.6 Compare Value Low Register (ADC1CVL) .................................................................240
14.4.7 Configuration Register (ADC1CFG) ............................................................................240
14.4.8 Pin Control 1 Register (APCTL1) ................................................................................242
14.4.9 Pin Control 2 Register (APCTL2) ................................................................................243
14.4.10 Pin Control 3 Register (APCTL3) ................................................................................244
14.5 Functional Description ..................................................................................................................245
14.5.1 Clock Select and Divide Control ..................................................................................245
14.5.2 Input Select and Pin Control .........................................................................................246
14.5.3 Hardware Trigger ..........................................................................................................246
14.5.4 Conversion Control .......................................................................................................246
14.5.5 Automatic Compare Function ......................................................................................249
14.5.6 MCU Wait Mode Operation .........................................................................................249
14.5.7 MCU Stop3 Mode Operation .......................................................................................249
14.5.8 MCU Stop1 and Stop2 Mode Operation ......................................................................250
14.6 Initialization Information ..............................................................................................................250
14.6.1 ADC Module Initialization Example ...........................................................................250
14.7 Application Information ................................................................................................................252
14.7.1 External Pins and Routing ............................................................................................252
14.7.2 Sources of Error ............................................................................................................254
Chapter 15
Development Support
15.1 Introduction ...................................................................................................................................257
15.1.1 Features .........................................................................................................................257
15.2 Background Debug Controller (BDC) ..........................................................................................258
15.2.1 BKGD Pin Description .................................................................................................258
15.2.2 Communication Details ................................................................................................259
15.2.3 BDC Commands ...........................................................................................................263
15.2.4 BDC Hardware Breakpoint ..........................................................................................265
15.3 On-Chip Debug System (DBG) ....................................................................................................266
15.3.1 Comparators A and B ...................................................................................................266
15.3.2 Bus Capture Information and FIFO Operation .............................................................266
15.3.3 Change-of-Flow Information ........................................................................................267
15.3.4 Tag vs. Force Breakpoints and Triggers .......................................................................267
15.3.5 Trigger Modes ..............................................................................................................268
15.3.6 Hardware Breakpoints ..................................................................................................270
15.4 Register Definition ........................................................................................................................270
15.4.1 BDC Registers and Control Bits ...................................................................................270
15.4.2 System Background Debug Force Reset Register (SBDFR) ........................................272
15.4.3 DBG Registers and Control Bits ..................................................................................273
MC9S08AW60 Data Sheet, Rev.1.0
16
Freescale Semiconductor