XRT83L34 Datasheet, PDF (52/82 Pages) Exar Corporation – QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR

XRT83L34
QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
PRELIMINARY
REV. P1.3.4
TABLE 21: MICROPROCESSOR REGISTER #2, BIT DESCRIPTION
REGISTER ADDRESS
0000010
0010010
0100010
0110010
CHANNEL_n
CHANNEL_0
CHANNEL_1
CHANNEL_2
CHANNEL_3
FUNCTION
REGISTER
TYPE
RESET
VALUE
BIT #
NAME
D7
INVQRSS_n Invert QRSS Pattern: When TQRSS is active, Writing a “1” to R/W
0
this bit inverts the polarity of transmitted QRSS pattern. Writing
a “0” sends the QRSS pattern with no inversion.
D6
TXTEST2_n Transmit Test Pattern bit 2: This bit together with TXTEST1 R/W
0
and TXTEST0 are used to generate and transmit test patterns
according to the following table:
TXTEST2
0
1
1
1
1
TXTEST1
X
0
0
1
1
TXTEST0
X
0
1
0
1
Test Pattern
No Pattern
TDQRSS
TAOS
TLUC
TLDC
TDQRSS (Transmit/Detect Quasi-Random Signal): This
condition when activated enables Quasi-Random Signal
Source generation and detection for the selected channel
number n. In a T1 system QRSS pattern is a 2²⁰-1 pseudo-
random bit sequence (PRBS) with no more than 14 consecu-
tive zeros. In a E1 system, QRSS is a 2¹⁵-1 PRBS pattern.
TAOS (Transmit All Ones): Activating this condition enables
the transmission of an All Ones Pattern from the selected
channel number n.
TLUC (Transmit Network Loop-Up Code): Activating this
condition enables the Network Loop-Up Code of “00001” to be
transmitted to the line for the selected channel number n.
When Network Loop-Up code is being transmitted, the
XRT83L34 will ignore the Automatic Loop-Code detection and
Remote Loop-Back activation (NLCDE1 =“1”, NLCDE0 =“1”, if
activated) in order to avoid activating Remote Digital Loop-
Back automatically when the remote terminal responds to the
Loop-Back request.
TLDC (Transmit Network Loop-Down Code): Activating this
condition enables the network Loop-Down Code of “001” to be
transmitted to the line for the selected channel number n.
D5
TXTEST1_n Transmit Test pattern bit 1: See description of bit D6 for the R/W
0
function of this bit.
D4
TXTEST0_n Transmit Test Pattern bit 0: See description of bit D6 for the R/W
0
function of this bit.
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