XRT83L34 Datasheet, PDF (13/82 Pages) Exar Corporation – QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR

XRT83L34
QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
REV. P1.3.4
PRELIMINARY
SIGNAL NAME
µPTS1
µPTS2
PIN #
106
107
TYPE
I
DESCRIPTION
Microprocessor Type Select Input Pins - Host Mode:
Microprocessor Type Select Input Bit 1
Microprocessor Type Select Input Bit 2
µPTS2
0
0
1
1
µPTS1
0
1
0
1
µP Type
68HC11, 8051, 80C188 (async.)
Motorola 68K (async.)
Intel x86 (sync.)
Motorola 860 (sync.)
RCLKE
TCLKE
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]/
D[1]/
D[0]/
LOOP1_0
LOOP0_0
LOOP1_1
LOOP0_1
LOOP1_2
LOOP0_2
LOOP1_3
LOOP0_3
µPCLK
ATAOS
106
Receive Clock Edge select - Hardware mode
See “Receive Clock Edge - Hardware Mode” on page 6.
107
Transmit Clock Edge select - Hardware mode
See “Transmit Clock Edge - Hardware Mode” on page 7.
NOTE: These pins are internally pulled “Low” with a 50kΩ resistor.
Microprocessor Read/Write Data Bus Pins - Host Mode
42
I/O Data Bus[7]
43
Data Bus[6]
44
Data Bus[5]
45
Data Bus[4]
46
Data Bus[3]
47
Data Bus[2]
48
Data Bus[1]
49
Data Bus[0]
42
Loop-back Control pin, Bits [1:0]_Channel_n - Hardware Mode
43
Pins 42 - 49 control which Loop-Back mode is selected per channel. See
44
“Loop-Back Control Pins - Hardware Mode:” on page 15.
45
NOTE: Internally pulled “Low” with a 50kΩ resistor.
46
47
48
49
50
I
Microprocessor Clock Input - Host Mode
Input clock for synchronous microprocessor operation. Maximum clock rate
is 54 MHz.
NOTE: This pin is internally pulled “Low” for asynchronous microprocessor
interface when no clock is present.
Automatic Transmit "All Ones” - Hardware mode
This pin functions as an Automatic Transmit “All Ones”. See “Automatic
Transmit “All Ones” Pattern - Hardware Mode” on page 14.
10