XRT75R03D_06 Datasheet, PDF (19/135 Pages) Exar Corporation – EXAR DATA SHEET FORMAT TEMPLATES

XRT75R03D
REV. 1.0.4
THREE CHANNEL E3/DS3/STS-1 LINE
SYSTEM-SIDE RECEIVE OUTPUT AND RECEIVE CONTROL PINS
PIN #
SIGNAL NAME
TYPE
DESCRIPTION
107 E3Clk/ CLK_EN
I
E3 Reference Clock Input/SFM Clock Output Enable:
The function of this chip depends upon whether or not the XRT75R03D has
been configured to operate in the Single-Frequency Mode.
If NOT operating in the Single-Frequency Mode
If the XRT75R03D has NOT been configured to operate in the SFM (Single Fre-
quency) Mode, and if at least one channel is to be operated in the E3 Mode,
then a 34.368MHz ± 20ppm clock signal must be applied to this input pin.
If the user does not intend to operate the device in the SFM Mode nor operate
any of the channels in the E3 Mode tie this input signal to GND.
If operating in the Single-Frequency Mode
If the XRT75R03D is operated in the SFM Mode and is to output a clock signal
that is synthesized from the SFM Clock Synthesizer PLL so that the user's sys-
tem can use this clock signal as a timing source, pull this input pin to a logic
"High".
If the user pull this input pin "High", then the XRT75R03D will output the line
rate clock signal that has been synthesized for Channel 1, via pin 108
(DS3CLK/CLK_OUT).
For example, if Channel 1 is configured to operate in the STS-1 Mode and this
input pin is pulled "High", then the XRT75R03D will output a 51.84MHz clock
signal via the CLK_OUT pin.
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