XRT75R03D_06 Datasheet, PDF (125/135 Pages) Exar Corporation – EXAR DATA SHEET FORMAT TEMPLATES

XRT75R03D
REV. 1.0.4
THREE CHANNEL E3/DS3/STS-1 LINE
Figure 58 indicates that the Data Signal from the Mapper device should be connected to the TPDATA_n input
pin of the LIU IC and that the Clock Signal from the Mapper device should be connected to the TCLK_n input
pin of the LIU IC.
In this application, the XRT75R03D has the following responsibilities.
• Using a particular clock edge within the "gapped" clock signal (from the Mapper IC) to sample and latch the
value of each DS3 data-bit that is output from the Mapper IC.
• To (through the user of the Jitter Attenuator block) attenuate the jitter within this "DS3 data" and "clock
signal" that is output from the Mapper IC.
• To convert this "smoothed" DS3 data and clock into industry-compliant DS3 pulses, and to output these
pulses onto the line.
To configure the XRT75R03D to operate in the correct mode for this application, the user must execute the
following configuration steps.
a. Configure the XRT75R03D to operate in the DS3 Mode
The user can configure a given channel (within the XRT75R03D) to operate in the DS3 Mode, by executing
either of the following steps.
• If the XRT75R03D has been configured to operate in the Host Mode
The user can accomplish this by setting both Bits 2 (E3_n) and Bits 1 (STS-1/DS3*_n), within each of the
"Channel Control Registers" to "0" as depicted below.
CHANNEL CONTROL REGISTER - CHANNEL 0 ADDRESS LOCATION = 0X06
CHANNEL 1 ADDRESS LOCATION = 0X0E
CHANNEL 2 ADDRESS LOCATION = 0X16
BIT 7
BIT 6
Unused
R/O
R/O
0
0
BIT 5
PRBS Enable
Ch_n
R/W
0
BIT 4
RLB_n
R/W
0
BIT 3
LLB_n
R/W
0
BIT 2
E3_n
BIT 1
STS-1/DS3_n
BIT 0
SR/DR_n
R/W
R/W
R/W
0
0
0
• If the XRT75R03D has been configured to operate in the Hardware Mode
The user can accomplish this by pulling all of the following input pins "Low".
Pin 76 - E3_0
Pin 94 - E3_1
Pin 85 - E3_2
Pin 72 - STS-1/DS3_0
Pin 98 - STS-1/DS3_1
Pin 81 - STS-1/DS3_2
b. Configure the XRT75R03D to operate in the Single-Rail Mode
Since the Mapper IC will typically output a single "Data Line" and a "Clock Line" for each DS3 signal that it
demaps from the incoming STS-N signal, it is imperative to configure each channel within the XRT75R03D to
operate in the Single Rail Mode.
The user can accomplish this by executing either of the following steps.
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