W78IRD2 Datasheet, PDF (9/76 Pages) Winbond – 8-BIT MICROCONTROLLER

W78IRD2
Port 0
Bit:
7
P0.7
6
P0.6
5
P0.5
4
P0.4
3
P0.3
2
P0.2
1
P0.1
0
P0.0
Mnemonic: P0
Address: 80h
Port 0 is an open-drain, bi-directional I/O port after chip is reset. Besides, it has internal pull-up
resisters enabled by setting P0UP of POPT (86H) to high. This port also provides a multiplexed, low-
order address/data bus when the W78IRD2 accesses external memory.
Stack Pointer
Bit:
7
SP.7
6
SP.6
5
SP.5
4
SP.4
3
SP.3
2
SP.2
1
SP.1
0
SP.0
Mnemonic: SP
Address: 81h
The Stack Pointer stores the RAM address (scratchpad RAM, not AUX-RAM) where the stack begins.
It always points to the top of the stack.
Data Pointer Low
Bit:
7
DPL.7
6
DPL.6
5
DPL.5
4
DPL.4
3
DPL.3
2
DPL.2
1
DPL.1
0
DPL.0
Mnemonic: DPL
Address: 82h
This is the low byte of the standard-8052 16-bit data pointer.
Data Pointer High
Bit:
7
DPH.7
6
DPH.6
5
DPH.5
4
DPH.4
3
DPH.3
2
DPH.2
1
DPH.1
0
DPH.0
Mnemonic: DPH
Address: 83h
This is the high byte of the standard-8052 16-bit data pointer.
Port 4.0 Low-Address Comparator
Bit:
7
6
5
4
3
2
1
0
P40AL.7 P40AL.6 P40AL.5 P40AL.4 P40AL.3 P40AL.2 P40AL.1 P40AL.0
Mnemonic: P40AL
Address: 84h
Port 4.0 High-Address Comparator
Bit:
7
6
5
4
3
2
1
0
P40AH.7 P40AH.6 P40AH.5 P40AH.4 P40AH.3 P40AH.2 P40AH.1 P40AH.0
Mnemonic: P40AH
Address: 85h
Port Option Register
Publication Release Date: October 2, 2006
-9-
Revision A7