W78IRD2 Datasheet, PDF (39/76 Pages) Winbond – 8-BIT MICROCONTROLLER

W78IRD2
As mentioned before, data enters and leaves the serial port on RxD. TxD line provides the shift clock,
which shifts data into and out of the W78IRD2 and the device at the other end of the line. Any
instruction that writes to SBUF starts the transmission. The shift clock is activated, and the data is
shifted out on the RxD pin until all eight bits are transmitted. If SM2 is set to 1, the data appears on
RxD one clock period before the falling edge on TxD, and the TxD clock then remains low for two clock
periods before going high again. If SM2 is set to 0, the data appears on RxD three clock periods before
the falling edge on TxD, and the TxD clock then remains low for six clock periods before going high
again. This ensures that the receiving device can clock RxD data on the rising edge of TxD or when the
TxD clock is low. Finally, the TI flag is set high in C1 once the last bit has been transmitted.
The serial port receives data when REN is 1 and RI is zero. The TxD clock is activated, and the serial
port latches data on the rising edge of the shift clock. As a result, the external device should present
data on the falling edge of TxD. This process continues until all eight bits have been received. Then,
after the last rising edge on TxD, the RI flag is set high in C1, which stops reception until RI is cleared
by the software.
10.2 MODE 1
Mode 1 is a full–duplex, asynchronous mode. Serial communication frames are made up of ten bits
transmitted on TXD and received on RXD. The ten bits consist of a start bit (0), eight data bits (LSB
first), and a stop bit (1). When the W78IRD2 receives data, the stop bit goes into RB8 in SCON. The
baud rate is either 1/16 or 1/32 of the Timer 1 overflow, which can be set to a variety of reload values.
(The 1/16 or 1/32 factor is determined by the SMOD bit in PCON SFR.) The functional diagram is
shown below.
Timer 1
Overflow
Timer 2
Overflow
2
SMOD = 0 1
TCLK _{0 1}
16
RCLK
01
16
SAMPLE
1-TO-0
DETECTOR
RXD
Write to
SBUF
Internal
Data Bus
TX START TX SHIFT
TX CLOCK
TI
SERIAL
CONTROLLER ^RI
Transmit Shift Register
STOP
PARIN
START ^SOUT
LOAD
CLOCK
RX CLOCK
RX
START
LOAD
SBUF
RX SHIFT
BIT
DETECTOR
CLOCK
PAROUT
SBUF
SIN
D8
RB8
Receive Shift Register
TXD
Serial Port
Interrupt
Read
SBUF
Internal
Data
Bus
Figure 10-2 Serial Port Mode 1
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Publication Release Date: October 2, 2006
Revision A7