W78IRD2 Datasheet, PDF (41/76 Pages) Winbond – 8-BIT MICROCONTROLLER

W78IRD2
of the counter (divided by 32 or 64) before the data is put on TxD. The next bit is placed on TxD after
the next rollover. After all nine bits of data are transmitted, the stop bit is transmitted. Finally, the TI flag
is set, at the eleventh rollover after the write signal.
Reception is enabled only if REN is high. The W78IRD2 samples the RxD line at a rate of 16 times the
selected baud rate, looking for a falling edge. When a falling edge is detected on the RxD pin, the
counter (divided by 32 or 64) is immediately reset to align the bit boundaries better, and the serial port
starts receiving data. The 16 states of the counter effectively divide the time into 16 slices, and bit
detection is done on a best-of-three basis using the eighth, ninth and tenth states. If the start bit is
invalid (1), reception is aborted, and the serial port resumes looking for a falling edge on RxD. If the
start bit is valid, the rest of the bits are shifted in. Then, if
(1) RI = 0 and
(2) Either SM2 = 0 or the received 9th bit = 1,
the ninth bit is put into RB8, the data is put in SBUF, and RI is set. Otherwise, the received frame may
be lost. In the middle of the stop bit, the W78IRD2 resumes looking for falling edges on RxD.
10.4 MODE 3
Mode 3 is similar to mode 2 in all respects, except that the baud rate is programmable the same way it
is programmable in mode 1. The functional diagram is shown below.
Timer 1
Overflow
Timer 2
Overflow
2
SMOD = 0 1
TCLK _{0 1}
16
RCLK
01
16
SAMPLE
1-TO-0
DETECTOR
RXD
Write to
SBUF
TB8
Internal
Data Bus
TX START TX SHIFT
TX CLOCK
TI
SERIAL
CONTROLLER ^RI
STOP
D8
PARIN
START ^SOUT
LOAD
CLOCK
Transmit Shift Register
TXD
Serial Port
Interrupt
RX CLOCK
RX
START
LOAD
SBUF
RX SHIFT
BIT
DETECTOR
CLOCK
PAROUT
SBUF
SIN
D8
RB8
Receive Shift Register
Read
SBUF
Internal
Data
Bus
Figure 10-4 Serial Port Mode 3
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Publication Release Date: October 2, 2006
Revision A7