W78IRD2 Datasheet, PDF (5/76 Pages) Winbond – 8-BIT MICROCONTROLLER

W78IRD2
4. PIN DESCRIPTION
SYMBOL
EA
TYPE*
DESCRIPTIONS
EXTERNAL ACCESS ENABLE: This pin forces the processor to execute
I ^{instructions in external ROM. The ROM address and data are not presented on}
the bus if the EA pin is high.
PSEN
PROGRAM STORE ENABLE: PSEN indicates external ROM data is on the
O H _{Port 0 address/data bus. If internal ROM is accessed, no PSEN strobe signal}
is present on this pin.
ADDRESS LATCH ENABLE: ALE is used to enable the address latch that
ALE
O H separates the address from the data on Port 0. ALE runs at 1/6th of the
oscillator frequency.
RST
IL
RESET: If this pin is set high for two machine cycles while the oscillator is
running, the W78IRD2 is reset.
XTAL1
I CRYSTAL 1: Crystal oscillator input or external clock input.
XTAL2
O CRYSTAL 2: Crystal oscillator output.
V_SS
V_DD
P0.0 − P0.7
I GROUND: ground potential.
I POWER SUPPLY: Supply voltage for operation.
PORT 0: 8-bit, bi-directional I/O port, the same as that of the standard 80C52
I/O D
Port 0 has internal pull-up resisters enabled by software.
P1.0 − P1.7 I/O H PORT 1: 8-bit, bi-directional I/O port, the same as that of the standard 80C52.
P2.0 − P2.7
I/O H
PORT 2: 8-bit, bi-directional I/O port with internal pull-ups. This port also
provides the upper address bits when accessing external memory.
P3.0 − P3.7 I/O H PORT 3: 8-bit, bi-directional I/O port, the same as that of the standard 80C52.
P4.0 − P4.3 I/O H PORT 4: 4-bit, bi-directional I/O port with chip-select functions.
* Note: TYPE I: input, O: output, I/O: bi-directional, H: pull-high, L: pull-low, D: open drain
Publication Release Date: October 2, 2006
-5-
Revision A7